Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5497159c authored by ludovic.desroches@atmel.com's avatar ludovic.desroches@atmel.com Committed by Ulf Hansson
Browse files

mmc: sdhci: switch from programmable clock mode to divided one if needed 



In programmable mode, if the clock frequency is too high, the divider
can be too small to meet the clock frequency requirement especially to
init the SD card. In this case, switch to the divided clock mode.

Signed-off-by: default avatarLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 57e10486

drivers/mmc/host/sdhci.c

+20 −9
Original line number Diff line number Diff line
@@ -1151,6 +1151,7 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 
	int real_div = div, clk_mul = 1;

	u16 clk = 0;

	unsigned long timeout;

	bool switch_base_clk = false;



	host->mmc->actual_clock = 0;
@@ -1188,6 +1189,7 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 
					<= clock)

					break;

			}

			if ((host->max_clk * host->clk_mul / div) <= clock) {

				/*

				 * Set Programmable Clock Mode in the Clock

				 * Control register.
@@ -1197,6 +1199,15 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 
				clk_mul = host->clk_mul;

				div--;

			} else {

				/*

				 * Divisor can be too small to reach clock

				 * speed requirement. Then use the base clock.

				 */

				switch_base_clk = true;

			}

		}



		if (!host->clk_mul || switch_base_clk) {

			/* Version 3.00 divisors must be a multiple of 2. */

			if (host->max_clk <= clock)

				div = 1;