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Commit 547e24c4 authored by Mayank Rana's avatar Mayank Rana
Browse files

usb: phy: Update BIAS_CTRL2 register based on REFGEN status 



This change adds support to read REFGEN status and override BIAS_CTRL2
register for better USB compliance result.

Change-Id: Id8f27b086870046203afea899e95b5e5f0106029
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
parent 129111e7

Documentation/devicetree/bindings/usb/msm-phy.txt

+1 −0
Original line number Diff line number Diff line
@@ -159,6 +159,7 @@ Optional properties: 
   "efuse_addr": EFUSE address to read and update analog tune parameter.

   "emu_phy_base" : phy base address used for programming emulation target phy.

   "ref_clk_addr" : ref_clk bcr address used for on/off ref_clk before reset.

   "refgen_north_bg_reg" : address used to read REFGEN status for overriding QUSB PHY register.

 - clocks: a list of phandles to the PHY clocks. Use as per

   Documentation/devicetree/bindings/clock/clock-bindings.txt

 - clock-names: Names of the clocks in 1-1 correspondence with the "clocks"

drivers/usb/phy/phy-msm-qusb-v2.c

+17 −0
Original line number Diff line number Diff line
@@ -63,6 +63,11 @@ 
#define LINESTATE_DP			BIT(0)

#define LINESTATE_DM			BIT(1)



#define BIAS_CTRL_2_OVERRIDE_VAL	0x28



/* PERIPH_SS_PHY_REFGEN_NORTH_BG_CTRL register bits */

#define BANDGAP_BYPASS			BIT(0)



unsigned int phy_tune1;

module_param(phy_tune1, uint, 0644);

MODULE_PARM_DESC(phy_tune1, "QUSB PHY v2 TUNE1");
@@ -83,6 +88,7 @@ struct qusb_phy { 
	struct mutex		lock;

	void __iomem		*base;

	void __iomem		*efuse_reg;

	void __iomem		*refgen_north_bg_reg;



	struct clk		*ref_clk_src;

	struct clk		*ref_clk;
@@ -467,6 +473,11 @@ static int qusb_phy_init(struct usb_phy *phy) 
				qphy->base + qphy->phy_reg[PORT_TUNE1]);

	}



	if (qphy->refgen_north_bg_reg)

		if (readl_relaxed(qphy->refgen_north_bg_reg) & BANDGAP_BYPASS)

			writel_relaxed(BIAS_CTRL_2_OVERRIDE_VAL,

				qphy->base + qphy->phy_reg[BIAS_CTRL_2]);



	/* ensure above writes are completed before re-enabling PHY */

	wmb();
@@ -776,6 +787,12 @@ static int qusb_phy_probe(struct platform_device *pdev) 
		}

	}



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

					"refgen_north_bg_reg_addr");

	if (res)

		qphy->refgen_north_bg_reg = devm_ioremap(dev, res->start,

						resource_size(res));



	/* ref_clk_src is needed irrespective of SE_CLK or DIFF_CLK usage */

	qphy->ref_clk_src = devm_clk_get(dev, "ref_clk_src");

	if (IS_ERR(qphy->ref_clk_src)) {