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Commit 5476b2b7 authored by Abhilash Kesavan's avatar Abhilash Kesavan Committed by Wim Van Sebroeck
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watchdog: s3c2410_wdt: Fix the mask bit offset for Exynos7 



The watchdog mask bit offset listed for Exynos7 is incorrect.
Fix this.

Signed-off-by: default avatarAbhilash Kesavan <a.kesavan@samsung.com>
Acked-by: default avatarNaveen Krishna Chatradhi <naveenkrishna.ch@gmail.com>
Reviewd-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
parent 56c67ce1

drivers/watchdog/s3c2410_wdt.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -161,7 +161,7 @@ static const struct s3c2410_wdt_variant drv_data_exynos5420 = { 
static const struct s3c2410_wdt_variant drv_data_exynos7 = {

static const struct s3c2410_wdt_variant drv_data_exynos7 = {

	.disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,

	.disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,

	.mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,

	.mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,

	.mask_bit = 0,

	.mask_bit = 23,

	.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,

	.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,

	.rst_stat_bit = 23,	/* A57 WDTRESET */

	.rst_stat_bit = 23,	/* A57 WDTRESET */

	.quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT,

	.quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT,