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Commit 54267c22 authored by Sankeerth Billakanti's avatar Sankeerth Billakanti
Browse files

drm/msm/dp: use scaled up mvid/nvid values 



Experiments have found that scaled up values for Mvid and Nvid
close to 0x8000 while maintaining the ratio, works better for
different kinds of DP monitors. Use these scaled up values
for better interoperability with DP monitors.

Change-Id: Idfb52b2d9a0eeaa452d7376e998835112f4de61a
Signed-off-by: default avatarSankeerth Billakanti <sbillaka@codeaurora.org>
parent f9fcf08d

drivers/gpu/drm/msm/dp/dp_catalog.c

+21 −36
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -780,12 +780,10 @@ static void dp_catalog_ctrl_config_misc(struct dp_catalog_ctrl *ctrl, 
}



static void dp_catalog_ctrl_config_msa(struct dp_catalog_ctrl *ctrl,

					u32 rate, u32 stream_rate_khz,

					bool fixed_nvid)

					u32 rate, u32 stream_rate_khz)

{

	u32 pixel_m, pixel_n;

	u32 mvid, nvid;

	u64 mvid_calc;

	u32 const nvid_fixed = 0x8000;

	u32 const link_rate_hbr2 = 540000;

	u32 const link_rate_hbr3 = 810000;
@@ -798,26 +796,6 @@ static void dp_catalog_ctrl_config_msa(struct dp_catalog_ctrl *ctrl, 
	}



	catalog = dp_catalog_get_priv(ctrl);

	if (fixed_nvid) {

		pr_debug("use fixed NVID=0x%x\n", nvid_fixed);

		nvid = nvid_fixed;



		pr_debug("link rate=%dkbps, stream_rate_khz=%uKhz",

			rate, stream_rate_khz);



		/*

		 * For intermediate results, use 64 bit arithmetic to avoid

		 * loss of precision.

		 */

		mvid_calc = (u64) stream_rate_khz * nvid;

		mvid_calc = div_u64(mvid_calc, rate);



		/*

		 * truncate back to 32 bits as this final divided value will

		 * always be within the range of a 32 bit unsigned int.

		 */

		mvid = (u32) mvid_calc;

	} else {

	io_data = catalog->io.dp_mmss_cc;



	pixel_m = dp_read(catalog, io_data, MMSS_DP_PIXEL_M);
@@ -827,6 +805,14 @@ static void dp_catalog_ctrl_config_msa(struct dp_catalog_ctrl *ctrl, 
	mvid = (pixel_m & 0xFFFF) * 5;

	nvid = (0xFFFF & (~pixel_n)) + (pixel_m & 0xFFFF);



	if (nvid < nvid_fixed) {

		u32 temp;



		temp = (nvid_fixed / nvid) * nvid;

		mvid = (nvid_fixed / nvid) * mvid;

		nvid = temp;

	}



	pr_debug("rate = %d\n", rate);



	if (link_rate_hbr2 == rate)
@@ -834,7 +820,6 @@ static void dp_catalog_ctrl_config_msa(struct dp_catalog_ctrl *ctrl, 


	if (link_rate_hbr3 == rate)

		nvid *= 3;

	}



	io_data = catalog->io.dp_link;

	pr_debug("mvid=0x%x, nvid=0x%x\n", mvid, nvid);

drivers/gpu/drm/msm/dp/dp_catalog.h

+2 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -94,7 +94,7 @@ struct dp_catalog_ctrl { 
	void (*mainlink_ctrl)(struct dp_catalog_ctrl *ctrl, bool enable);

	void (*config_misc)(struct dp_catalog_ctrl *ctrl, u32 cc, u32 tb);

	void (*config_msa)(struct dp_catalog_ctrl *ctrl, u32 rate,

				u32 stream_rate_khz, bool fixed_nvid);

				u32 stream_rate_khz);

	void (*set_pattern)(struct dp_catalog_ctrl *ctrl, u32 pattern);

	void (*reset)(struct dp_catalog_ctrl *ctrl);

	void (*usb_reset)(struct dp_catalog_ctrl *ctrl, bool flip);

drivers/gpu/drm/msm/dp/dp_ctrl.c

+3 −23
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -1177,24 +1177,6 @@ static void dp_ctrl_host_deinit(struct dp_ctrl *dp_ctrl) 
	pr_debug("Host deinitialized successfully\n");

}



static bool dp_ctrl_use_fixed_nvid(struct dp_ctrl_private *ctrl)

{

	u8 *dpcd = ctrl->panel->dpcd;



	/*

	 * For better interop experience, used a fixed NVID=0x8000

	 * whenever connected to a VGA dongle downstream.

	 */

	if (dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT) {

		u8 type = dpcd[DP_DOWNSTREAMPORT_PRESENT] &

			DP_DWN_STRM_PORT_TYPE_MASK;

		if (type == DP_DWN_STRM_PORT_TYPE_ANALOG)

			return true;

	}



	return false;

}



static int dp_ctrl_link_maintenance(struct dp_ctrl *dp_ctrl)

{

	int ret = 0;
@@ -1247,8 +1229,7 @@ static int dp_ctrl_link_maintenance(struct dp_ctrl *dp_ctrl) 


		ctrl->catalog->config_msa(ctrl->catalog,

			drm_dp_bw_code_to_link_rate(

			ctrl->link->link_params.bw_code),

			ctrl->pixel_rate, dp_ctrl_use_fixed_nvid(ctrl));

			ctrl->link->link_params.bw_code), ctrl->pixel_rate);



		reinit_completion(&ctrl->idle_comp);
@@ -1414,8 +1395,7 @@ static int dp_ctrl_on(struct dp_ctrl *dp_ctrl) 
	while (--link_train_max_retries && !atomic_read(&ctrl->aborted)) {

		ctrl->catalog->config_msa(ctrl->catalog,

			drm_dp_bw_code_to_link_rate(

			ctrl->link->link_params.bw_code),

			ctrl->pixel_rate, dp_ctrl_use_fixed_nvid(ctrl));

			ctrl->link->link_params.bw_code), ctrl->pixel_rate);



		rc = dp_ctrl_setup_main_link(ctrl, true);

		if (!rc)