Loading drivers/usb/dwc3/core.c +15 −0 Original line number Diff line number Diff line Loading @@ -909,6 +909,21 @@ int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); } /* * Workaround for STAR 9001285599 which affects dwc3 core version 3.20a * only. If the PM TIMER ECN is enabled thru GUCTL2[19], then link * compliance test (TD7.21) may fail. If the ECN is not enabled * GUCTL2[19] = 0), the controller will use the old timer value (5us), * which is still fine for Link Compliance test. Hence Do not enable * PM TIMER ECN in V3.20a by setting GUCTL2[19] by default, * instead use GUCTL2[19] = 0. */ if (dwc->revision == DWC3_REVISION_320A) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); reg &= ~DWC3_GUCTL2_LC_TIMER; dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); } /* * Enable hardware control of sending remote wakeup in HS when * the device is in the L1 state. Loading drivers/usb/dwc3/core.h +1 −0 Original line number Diff line number Diff line Loading @@ -335,6 +335,7 @@ #define DWC3_GUCTL2_RST_ACTBITLATER (1 << 14) #define DWC3_GUCTL2_HP_TIMER(n) ((n) << 21) #define DWC3_GUCTL2_HP_TIMER_MASK DWC3_GUCTL2_HP_TIMER(0x1f) #define DWC3_GUCTL2_LC_TIMER (1 << 19) /* Device Configuration Register */ #define DWC3_DCFG_DEVADDR(addr) ((addr) << 3) Loading Loading
drivers/usb/dwc3/core.c +15 −0 Original line number Diff line number Diff line Loading @@ -909,6 +909,21 @@ int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); } /* * Workaround for STAR 9001285599 which affects dwc3 core version 3.20a * only. If the PM TIMER ECN is enabled thru GUCTL2[19], then link * compliance test (TD7.21) may fail. If the ECN is not enabled * GUCTL2[19] = 0), the controller will use the old timer value (5us), * which is still fine for Link Compliance test. Hence Do not enable * PM TIMER ECN in V3.20a by setting GUCTL2[19] by default, * instead use GUCTL2[19] = 0. */ if (dwc->revision == DWC3_REVISION_320A) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); reg &= ~DWC3_GUCTL2_LC_TIMER; dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); } /* * Enable hardware control of sending remote wakeup in HS when * the device is in the L1 state. Loading
drivers/usb/dwc3/core.h +1 −0 Original line number Diff line number Diff line Loading @@ -335,6 +335,7 @@ #define DWC3_GUCTL2_RST_ACTBITLATER (1 << 14) #define DWC3_GUCTL2_HP_TIMER(n) ((n) << 21) #define DWC3_GUCTL2_HP_TIMER_MASK DWC3_GUCTL2_HP_TIMER(0x1f) #define DWC3_GUCTL2_LC_TIMER (1 << 19) /* Device Configuration Register */ #define DWC3_DCFG_DEVADDR(addr) ((addr) << 3) Loading