Loading arch/arm64/boot/dts/qcom/msm8953-coresight.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ arm,buffer-size = <0x100000>; arm,sg-enable; qcom,force-reg-dump; coresight-name = "coresight-tmc-etr"; coresight-csr = <&csr>; Loading Loading @@ -53,6 +54,7 @@ coresight-csr = <&csr>; arm,default-sink; qcom,force-reg-dump; coresight-ctis = <&cti0 &cti8>; clocks = <&clock_gcc clk_qdss_clk>, Loading Loading
arch/arm64/boot/dts/qcom/msm8953-coresight.dtsi +2 −0 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ arm,buffer-size = <0x100000>; arm,sg-enable; qcom,force-reg-dump; coresight-name = "coresight-tmc-etr"; coresight-csr = <&csr>; Loading Loading @@ -53,6 +54,7 @@ coresight-csr = <&csr>; arm,default-sink; qcom,force-reg-dump; coresight-ctis = <&cti0 &cti8>; clocks = <&clock_gcc clk_qdss_clk>, Loading