Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 51baf468 authored by Rajakumar Govindaram's avatar Rajakumar Govindaram
Browse files

msm: camera: jpeg: move reg offsets to specific header



Move reg offsets from common file to header file specific
to current jpeg hw version.

Change-Id: I2eeb0d66b1881ec2d133d0dc935a0e83f3862153
Signed-off-by: default avatarRajakumar Govindaram <rajakuma@codeaurora.org>
parent 926163a1
Loading
Loading
Loading
Loading
+74 −0
Original line number Diff line number Diff line
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#ifndef CAM_JPEG_ENC_HW_INFO_TITAN170_H
#define CAM_JPEG_ENC_HW_INFO_TITAN170_H

#define CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK 0x00000001
#define CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_SHIFT 0x00000000

#define CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK 0x10000000
#define CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_SHIFT 0x0000000a

#define CAM_JPEG_HW_IRQ_STATUS_BUS_ERROR_MASK 0x00000800
#define CAM_JPEG_HW_IRQ_STATUS_BUS_ERROR_SHIFT 0x0000000b

#define CAM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF      (0x1<<19)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR     (0x1<<20)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR   (0x1<<21)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF (0x1<<22)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW    (0x1<<23)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM       (0x1<<24)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ   (0x1<<25)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM       (0x1<<26)
#define CAM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK        (0x1<<29)

#define CAM_JPEG_HW_MASK_COMP_FRAMEDONE \
		CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK
#define CAM_JPEG_HW_MASK_COMP_RESET_ACK \
		CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK
#define CAM_JPEG_HW_MASK_COMP_ERR \
		(CAM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM | \
		CAM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK)

static struct cam_jpeg_enc_device_hw_info cam_jpeg_enc_hw_info = {
	.reg_offset = {
		.hw_version = 0x0,
		.int_clr = 0x1c,
		.int_status = 0x20,
		.int_mask = 0x18,
		.hw_cmd = 0x10,
		.reset_cmd = 0x8,
		.encode_size = 0x180,
	},
	.reg_val = {
		.int_clr_clearall = 0xFFFFFFFF,
		.int_mask_disable_all = 0x00000000,
		.int_mask_enable_all = 0xFFFFFFFF,
		.hw_cmd_start = 0x00000001,
		.reset_cmd = 0x00032093,
	},
	.int_status = {
		.framedone = CAM_JPEG_HW_MASK_COMP_FRAMEDONE,
		.resetdone = CAM_JPEG_HW_MASK_COMP_RESET_ACK,
		.iserror = CAM_JPEG_HW_MASK_COMP_ERR,
	}
};

#endif /* CAM_JPEG_ENC_HW_INFO_TITAN170_H */
+24 −51
Original line number Diff line number Diff line
@@ -32,46 +32,12 @@
#include "cam_cpas_api.h"
#include "cam_debug_util.h"

#define CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK 0x00000001
#define CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_SHIFT 0x00000000

#define CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK 0x10000000
#define CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_SHIFT 0x0000000a

#define CAM_JPEG_HW_IRQ_STATUS_BUS_ERROR_MASK 0x00000800
#define CAM_JPEG_HW_IRQ_STATUS_BUS_ERROR_SHIFT 0x0000000b

#define CAM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF      (0x1<<19)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR     (0x1<<20)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR   (0x1<<21)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF (0x1<<22)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW    (0x1<<23)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM       (0x1<<24)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ   (0x1<<25)
#define CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM       (0x1<<26)
#define CAM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK        (0x1<<29)

#define CAM_JPEG_HW_MASK_COMP_FRAMEDONE \
		CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK
#define CAM_JPEG_HW_MASK_COMP_RESET_ACK \
		CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK
#define CAM_JPEG_HW_MASK_COMP_ERR \
		(CAM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ | \
		CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM | \
		CAM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK)

#define CAM_JPEG_HW_IRQ_IS_FRAME_DONE(jpeg_irq_status) \
	(jpeg_irq_status & CAM_JPEG_HW_MASK_COMP_FRAMEDONE)
#define CAM_JPEG_HW_IRQ_IS_RESET_ACK(jpeg_irq_status) \
	(jpeg_irq_status & CAM_JPEG_HW_MASK_COMP_RESET_ACK)
#define CAM_JPEG_HW_IRQ_IS_ERR(jpeg_irq_status) \
	(jpeg_irq_status & CAM_JPEG_HW_MASK_COMP_ERR)
#define CAM_JPEG_HW_IRQ_IS_FRAME_DONE(jpeg_irq_status, hi) \
	((jpeg_irq_status) & (hi)->int_status.framedone)
#define CAM_JPEG_HW_IRQ_IS_RESET_ACK(jpeg_irq_status, hi) \
	((jpeg_irq_status) & (hi)->int_status.resetdone)
#define CAM_JPEG_HW_IRQ_IS_ERR(jpeg_irq_status, hi) \
	((jpeg_irq_status) & (hi)->int_status.iserror)

#define CAM_JPEG_ENC_RESET_TIMEOUT msecs_to_jiffies(500)

@@ -207,17 +173,19 @@ irqreturn_t cam_jpeg_enc_irq(int irq_num, void *data)
	mem_base = soc_info->reg_map[0].mem_base;

	irq_status = cam_io_r_mb(mem_base +
		core_info->jpeg_enc_hw_info->int_status);
		core_info->jpeg_enc_hw_info->reg_offset.int_status);

	cam_io_w_mb(irq_status,
		soc_info->reg_map[0].mem_base +
		core_info->jpeg_enc_hw_info->int_clr);
		core_info->jpeg_enc_hw_info->reg_offset.int_clr);

	CAM_DBG(CAM_JPEG, "irq_num %d  irq_status = %x , core_state %d",
		irq_num, irq_status, core_info->core_state);
	if (CAM_JPEG_HW_IRQ_IS_FRAME_DONE(irq_status)) {
	if (CAM_JPEG_HW_IRQ_IS_FRAME_DONE(irq_status, hw_info)) {
		if (core_info->core_state == CAM_JPEG_ENC_CORE_READY) {
			encoded_size = cam_io_r_mb(mem_base + 0x180);
			encoded_size = cam_io_r_mb(mem_base +
				core_info->jpeg_enc_hw_info->reg_offset.
				encode_size);
			if (core_info->irq_cb.jpeg_hw_mgr_cb) {
				core_info->irq_cb.jpeg_hw_mgr_cb(irq_status,
					encoded_size,
@@ -229,7 +197,7 @@ irqreturn_t cam_jpeg_enc_irq(int irq_num, void *data)

		core_info->core_state = CAM_JPEG_ENC_CORE_NOT_READY;
	}
	if (CAM_JPEG_HW_IRQ_IS_RESET_ACK(irq_status)) {
	if (CAM_JPEG_HW_IRQ_IS_RESET_ACK(irq_status, hw_info)) {
		if (core_info->core_state == CAM_JPEG_ENC_CORE_RESETTING) {
			core_info->core_state = CAM_JPEG_ENC_CORE_READY;
			complete(&jpeg_enc_dev->hw_complete);
@@ -238,7 +206,7 @@ irqreturn_t cam_jpeg_enc_irq(int irq_num, void *data)
		}
	}
	/* Unexpected/unintended HW interrupt */
	if (CAM_JPEG_HW_IRQ_IS_ERR(irq_status)) {
	if (CAM_JPEG_HW_IRQ_IS_ERR(irq_status, hw_info)) {
		core_info->core_state = CAM_JPEG_ENC_CORE_NOT_READY;
		CAM_ERR_RATE_LIMIT(CAM_JPEG,
			"error irq_num %d  irq_status = %x , core_state %d",
@@ -285,10 +253,14 @@ int cam_jpeg_enc_reset_hw(void *data,

	core_info->core_state = CAM_JPEG_ENC_CORE_RESETTING;

	cam_io_w_mb(0x00000000, mem_base + hw_info->int_mask);
	cam_io_w_mb(0xFFFFFFFF, mem_base + hw_info->int_clr);
	cam_io_w_mb(0xFFFFFFFF, mem_base + hw_info->int_mask);
	cam_io_w_mb(0x00032093, mem_base + hw_info->reset_cmd);
	cam_io_w_mb(hw_info->reg_val.int_mask_disable_all,
		mem_base + hw_info->reg_offset.int_mask);
	cam_io_w_mb(hw_info->reg_val.int_clr_clearall,
		mem_base + hw_info->reg_offset.int_clr);
	cam_io_w_mb(hw_info->reg_val.int_mask_enable_all,
		mem_base + hw_info->reg_offset.int_mask);
	cam_io_w_mb(hw_info->reg_val.reset_cmd,
		mem_base + hw_info->reg_offset.reset_cmd);

	rem_jiffies = wait_for_completion_timeout(&jpeg_enc_dev->hw_complete,
		CAM_JPEG_ENC_RESET_TIMEOUT);
@@ -325,7 +297,8 @@ int cam_jpeg_enc_start_hw(void *data,
		return -EINVAL;
	}

	cam_io_w_mb(0x00000001, mem_base + 0x00000010);
	cam_io_w_mb(hw_info->reg_val.hw_cmd_start,
		mem_base + hw_info->reg_offset.hw_cmd);

	return 0;
}
+23 −1
Original line number Diff line number Diff line
@@ -19,12 +19,34 @@
#include <linux/platform_device.h>
#include <linux/dma-buf.h>

struct cam_jpeg_enc_device_hw_info {
struct cam_jpeg_enc_reg_offsets {
	uint32_t hw_version;
	uint32_t int_status;
	uint32_t int_clr;
	uint32_t int_mask;
	uint32_t hw_cmd;
	uint32_t reset_cmd;
	uint32_t encode_size;
};

struct cam_jpeg_enc_regval {
	uint32_t int_clr_clearall;
	uint32_t int_mask_disable_all;
	uint32_t int_mask_enable_all;
	uint32_t hw_cmd_start;
	uint32_t reset_cmd;
};

struct cam_jpeg_enc_int_status {
	uint32_t framedone;
	uint32_t resetdone;
	uint32_t iserror;
};

struct cam_jpeg_enc_device_hw_info {
	struct cam_jpeg_enc_reg_offsets reg_offset;
	struct cam_jpeg_enc_regval reg_val;
	struct cam_jpeg_enc_int_status int_status;
};

struct cam_jpeg_enc_set_irq_cb {
+1 −9
Original line number Diff line number Diff line
@@ -25,15 +25,7 @@
#include "cam_jpeg_hw_mgr_intf.h"
#include "cam_cpas_api.h"
#include "cam_debug_util.h"

static struct cam_jpeg_enc_device_hw_info cam_jpeg_enc_hw_info = {
	.int_clr = 0x1c,
	.int_status = 0x20,
	.int_mask = 0x18,
	.reset_cmd = 0x8,
	.hw_version = 0x0,
};
EXPORT_SYMBOL(cam_jpeg_enc_hw_info);
#include "cam_jpeg_enc_hw_info_ver_4_2_0.h"

static int cam_jpeg_enc_register_cpas(struct cam_hw_soc_info *soc_info,
	struct cam_jpeg_enc_device_core_info *core_info,