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Commit 513aa6ea authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
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tg3: Adjust BD replenish thresholds



The BD replenish thresholds for the 57765 and newer ASIC revs are a
little strict.  They were tuned for a mode that is currently unused.
This patch relaxes the thresholds so that they are set to values more
inline with the resources available.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent f3791cdf
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+3 −5
Original line number Diff line number Diff line
@@ -8171,7 +8171,8 @@ static void tg3_setup_rxbd_thresholds(struct tg3 *tp)
	if (!tg3_flag(tp, 5750_PLUS) ||
	    tg3_flag(tp, 5780_CLASS) ||
	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
	    tg3_flag(tp, 57765_PLUS))
		bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5700;
	else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
		 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
@@ -8191,10 +8192,7 @@ static void tg3_setup_rxbd_thresholds(struct tg3 *tp)
	if (!tg3_flag(tp, JUMBO_CAPABLE) || tg3_flag(tp, 5780_CLASS))
		return;

	if (!tg3_flag(tp, 5705_PLUS))
	bdcache_maxcnt = TG3_SRAM_RX_JMB_BDCACHE_SIZE_5700;
	else
		bdcache_maxcnt = TG3_SRAM_RX_JMB_BDCACHE_SIZE_5717;

	host_rep_thresh = max_t(u32, tp->rx_jumbo_pending / 8, 1);