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Commit 51096c40 authored by Kyle Yan's avatar Kyle Yan
Browse files

drivers: edac: Fix error code parsing and initial check for bus errors 



Primary error code reporting is out of sync with latest documentation.
Update the error values to properly reflect what is listed. Further add
an initial check for bus errors before reporting any uncorrectable error
so that it will not be confused for an ECC error.

Change-Id: If5e6adee3420751e8ad399c57568985fc63bf66c
Signed-off-by: default avatarKyle Yan <kyan@codeaurora.org>
parent 2d097a73

drivers/edac/kryo3xx_arm64_edac.c

+23 −4
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ static inline void set_errxctlr_el1(void) 


static inline void set_errxmisc_overflow(void)

{

	u64 val = 0x7F7F00000000;

	u64 val = 0x7F7F00000000ULL;



	asm volatile("msr s3_0_c5_c5_0, %0" : : "r" (val));

}
@@ -118,8 +118,9 @@ static const struct errors_edac errors[] = { 
#define DATA_BUF_ERR		0x2

#define CACHE_DATA_ERR		0x6

#define CACHE_TAG_DIRTY_ERR	0x7

#define TLB_PARITY_ERR		0x8

#define BUS_ERROR		0x18

#define TLB_PARITY_ERR_DATA	0x8

#define TLB_PARITY_ERR_TAG	0x9

#define BUS_ERROR		0x12



struct erp_drvdata {

	struct edac_device_ctl_info *edev_ctl;
@@ -217,10 +218,13 @@ static void dump_err_reg(int errorcode, int level, u64 errxstatus, u64 errxmisc, 
		edac_printk(KERN_CRIT, EDAC_CPU, "ECC Error from cache tag or dirty RAM\n");

		break;



	case TLB_PARITY_ERR:

	case TLB_PARITY_ERR_DATA:

		edac_printk(KERN_CRIT, EDAC_CPU, "Parity error on TLB RAM\n");

		break;



	case TLB_PARITY_ERR_TAG:

		edac_printk(KERN_CRIT, EDAC_CPU, "Parity error on TLB DATA\n");



	case BUS_ERROR:

		edac_printk(KERN_CRIT, EDAC_CPU, "Bus Error\n");

		break;
@@ -283,6 +287,16 @@ static void kryo3xx_check_l1_l2_ecc(void *info) 
	spin_unlock_irqrestore(&local_handler_lock, flags);

}



static bool l3_is_bus_error(u64 errxstatus)

{

	if (KRYO3XX_ERRXSTATUS_SERR(errxstatus) == BUS_ERROR) {

		edac_printk(KERN_CRIT, EDAC_CPU, "Bus Error\n");

		return true;

	}



	return false;

}



static void kryo3xx_check_l3_scu_error(struct edac_device_ctl_info *edev_ctl)

{

	u64 errxstatus = 0;
@@ -296,6 +310,11 @@ static void kryo3xx_check_l3_scu_error(struct edac_device_ctl_info *edev_ctl) 


	if (KRYO3XX_ERRXSTATUS_VALID(errxstatus) &&

		KRYO3XX_ERRXMISC_LVL(errxmisc) == L3) {

		if (l3_is_bus_error(errxstatus)) {

			if (edev_ctl->panic_on_ue)

				panic("Causing panic due to Bus Error\n");

			return;

		}

		if (KRYO3XX_ERRXSTATUS_UE(errxstatus)) {

			edac_printk(KERN_CRIT, EDAC_CPU, "Detected L3 uncorrectable error\n");

			dump_err_reg(KRYO3XX_L3_UE, L3, errxstatus, errxmisc,