Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +19 −0 Original line number Diff line number Diff line Loading @@ -955,12 +955,30 @@ static int dsi_message_tx(struct dsi_ctrl *dsi_ctrl, u8 *cmdbuf; struct dsi_mode_info *timing; /* override cmd fetch mode during secure session */ if (dsi_ctrl->secure_mode) { flags &= ~DSI_CTRL_CMD_FETCH_MEMORY; flags |= DSI_CTRL_CMD_FIFO_STORE; pr_debug("[%s] override to TPG during secure session\n", dsi_ctrl->name); } rc = mipi_dsi_create_packet(&packet, msg); if (rc) { pr_err("Failed to create message packet, rc=%d\n", rc); goto error; } /* fail cmds more than the supported size in TPG mode */ if ((flags & DSI_CTRL_CMD_FIFO_STORE) && (msg->tx_len > DSI_CTRL_MAX_CMD_FIFO_STORE_SIZE)) { pr_err("[%s] TPG cmd size:%zd not supported, secure:%d\n", dsi_ctrl->name, msg->tx_len, dsi_ctrl->secure_mode); rc = -ENOTSUPP; goto error; } rc = dsi_ctrl_copy_and_pad_cmd(dsi_ctrl, &packet, &buffer, Loading Loading @@ -1554,6 +1572,7 @@ static int dsi_ctrl_dev_probe(struct platform_device *pdev) mutex_unlock(&dsi_ctrl_list_lock); mutex_init(&dsi_ctrl->ctrl_lock); dsi_ctrl->secure_mode = false; dsi_ctrl->pdev = pdev; platform_set_drvdata(pdev, dsi_ctrl); Loading drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +6 −1 Original line number Diff line number Diff line Loading @@ -46,6 +46,9 @@ #define DSI_CTRL_CMD_FETCH_MEMORY 0x20 #define DSI_CTRL_CMD_LAST_COMMAND 0x40 /* max size supported for dsi cmd transfer using TPG */ #define DSI_CTRL_MAX_CMD_FIFO_STORE_SIZE 64 /** * enum dsi_power_state - defines power states for dsi controller. * @DSI_CTRL_POWER_VREG_OFF: Digital and analog supplies for DSI controller Loading Loading @@ -191,8 +194,9 @@ struct dsi_ctrl_interrupts { * Origin is top left of this CTRL. * @tx_cmd_buf: Tx command buffer. * @cmd_buffer_iova: cmd buffer mapped address. * @vaddr: CPU virtual address of cmd buffer. * @cmd_buffer_size: Size of command buffer. * @vaddr: CPU virtual address of cmd buffer. * @secure_mode: Indicates if secure-session is in progress * @debugfs_root: Root for debugfs entries. * @misr_enable: Frame MISR enable/disable * @misr_cache: Cached Frame MISR value Loading Loading @@ -236,6 +240,7 @@ struct dsi_ctrl { u32 cmd_buffer_iova; u32 cmd_len; void *vaddr; u32 secure_mode; /* Debug Information */ struct dentry *debugfs_root; Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +1 −0 Original line number Diff line number Diff line Loading @@ -1972,6 +1972,7 @@ static void dsi_display_aspace_cb_locked(void *cb_data, bool is_detach) display_ctrl->ctrl->cmd_buffer_size = display->cmd_buffer_size; display_ctrl->ctrl->cmd_buffer_iova = display->cmd_buffer_iova; display_ctrl->ctrl->vaddr = display->vaddr; display_ctrl->ctrl->secure_mode = is_detach ? true : false; } end: Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c +19 −0 Original line number Diff line number Diff line Loading @@ -955,12 +955,30 @@ static int dsi_message_tx(struct dsi_ctrl *dsi_ctrl, u8 *cmdbuf; struct dsi_mode_info *timing; /* override cmd fetch mode during secure session */ if (dsi_ctrl->secure_mode) { flags &= ~DSI_CTRL_CMD_FETCH_MEMORY; flags |= DSI_CTRL_CMD_FIFO_STORE; pr_debug("[%s] override to TPG during secure session\n", dsi_ctrl->name); } rc = mipi_dsi_create_packet(&packet, msg); if (rc) { pr_err("Failed to create message packet, rc=%d\n", rc); goto error; } /* fail cmds more than the supported size in TPG mode */ if ((flags & DSI_CTRL_CMD_FIFO_STORE) && (msg->tx_len > DSI_CTRL_MAX_CMD_FIFO_STORE_SIZE)) { pr_err("[%s] TPG cmd size:%zd not supported, secure:%d\n", dsi_ctrl->name, msg->tx_len, dsi_ctrl->secure_mode); rc = -ENOTSUPP; goto error; } rc = dsi_ctrl_copy_and_pad_cmd(dsi_ctrl, &packet, &buffer, Loading Loading @@ -1554,6 +1572,7 @@ static int dsi_ctrl_dev_probe(struct platform_device *pdev) mutex_unlock(&dsi_ctrl_list_lock); mutex_init(&dsi_ctrl->ctrl_lock); dsi_ctrl->secure_mode = false; dsi_ctrl->pdev = pdev; platform_set_drvdata(pdev, dsi_ctrl); Loading
drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h +6 −1 Original line number Diff line number Diff line Loading @@ -46,6 +46,9 @@ #define DSI_CTRL_CMD_FETCH_MEMORY 0x20 #define DSI_CTRL_CMD_LAST_COMMAND 0x40 /* max size supported for dsi cmd transfer using TPG */ #define DSI_CTRL_MAX_CMD_FIFO_STORE_SIZE 64 /** * enum dsi_power_state - defines power states for dsi controller. * @DSI_CTRL_POWER_VREG_OFF: Digital and analog supplies for DSI controller Loading Loading @@ -191,8 +194,9 @@ struct dsi_ctrl_interrupts { * Origin is top left of this CTRL. * @tx_cmd_buf: Tx command buffer. * @cmd_buffer_iova: cmd buffer mapped address. * @vaddr: CPU virtual address of cmd buffer. * @cmd_buffer_size: Size of command buffer. * @vaddr: CPU virtual address of cmd buffer. * @secure_mode: Indicates if secure-session is in progress * @debugfs_root: Root for debugfs entries. * @misr_enable: Frame MISR enable/disable * @misr_cache: Cached Frame MISR value Loading Loading @@ -236,6 +240,7 @@ struct dsi_ctrl { u32 cmd_buffer_iova; u32 cmd_len; void *vaddr; u32 secure_mode; /* Debug Information */ struct dentry *debugfs_root; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +1 −0 Original line number Diff line number Diff line Loading @@ -1972,6 +1972,7 @@ static void dsi_display_aspace_cb_locked(void *cb_data, bool is_detach) display_ctrl->ctrl->cmd_buffer_size = display->cmd_buffer_size; display_ctrl->ctrl->cmd_buffer_iova = display->cmd_buffer_iova; display_ctrl->ctrl->vaddr = display->vaddr; display_ctrl->ctrl->secure_mode = is_detach ? true : false; } end: Loading