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Commit 4fea83ff authored by Flora Cui's avatar Flora Cui Committed by Alex Deucher
Browse files

drm/amdgpu: expose AMDGPU_GEM_CREATE_VRAM_CLEARED to user space



V2: fix the return value for fill failure and validate bo before
filling data

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarFlora Cui <Flora.Cui@amd.com>
Reviewed-by: default avatarChunming Zhou <David1.Zhou@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 59b4a977
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+33 −0
Original line number Original line Diff line number Diff line
@@ -340,11 +340,44 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
	if (unlikely(r != 0)) {
	if (unlikely(r != 0)) {
		return r;
		return r;
	}
	}

	if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
	    bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
		struct fence *fence;

		if (adev->mman.buffer_funcs_ring == NULL ||
		   !adev->mman.buffer_funcs_ring->ready) {
			r = -EBUSY;
			goto fail_free;
		}

		r = amdgpu_bo_reserve(bo, false);
		if (unlikely(r != 0))
			goto fail_free;

		amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
		r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
		if (unlikely(r != 0))
			goto fail_unreserve;

		amdgpu_fill_buffer(bo, 0, bo->tbo.resv, &fence);
		amdgpu_bo_fence(bo, fence, false);
		amdgpu_bo_unreserve(bo);
		fence_put(bo->tbo.moving);
		bo->tbo.moving = fence_get(fence);
		fence_put(fence);
	}
	*bo_ptr = bo;
	*bo_ptr = bo;


	trace_amdgpu_bo_create(bo);
	trace_amdgpu_bo_create(bo);


	return 0;
	return 0;

fail_unreserve:
	amdgpu_bo_unreserve(bo);
fail_free:
	amdgpu_bo_unref(&bo);
	return r;
}
}


int amdgpu_bo_create(struct amdgpu_device *adev,
int amdgpu_bo_create(struct amdgpu_device *adev,
+2 −0
Original line number Original line Diff line number Diff line
@@ -77,6 +77,8 @@ extern "C" {
#define AMDGPU_GEM_CREATE_NO_CPU_ACCESS		(1 << 1)
#define AMDGPU_GEM_CREATE_NO_CPU_ACCESS		(1 << 1)
/* Flag that USWC attributes should be used for GTT */
/* Flag that USWC attributes should be used for GTT */
#define AMDGPU_GEM_CREATE_CPU_GTT_USWC		(1 << 2)
#define AMDGPU_GEM_CREATE_CPU_GTT_USWC		(1 << 2)
/* Flag that the memory should be in VRAM and cleared */
#define AMDGPU_GEM_CREATE_VRAM_CLEARED		(1 << 3)


struct drm_amdgpu_gem_create_in  {
struct drm_amdgpu_gem_create_in  {
	/** the requested memory size */
	/** the requested memory size */