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Commit 4f8449b1 authored by Hans de Goede's avatar Hans de Goede Committed by Maxime Ripard
Browse files

ARM: dts: sun8i: Add A33 usb-phy and otg nodes 



Note these are added to the sun8i-a33.dtsi file rather then to the shared
sun8i-a23-a33.dtsi file as both the phy and the otg controller on the a33
are slightly different.

Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 5c4f81c1

arch/arm/boot/dts/sun8i-a33.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -80,6 +80,39 @@ 
			clock-output-names = "mbus";

		};

	};



	soc@01c00000 {

		usb_otg: usb@01c19000 {

			compatible = "allwinner,sun8i-a33-musb";

			reg = <0x01c19000 0x0400>;

			clocks = <&ahb1_gates 24>;

			resets = <&ahb1_rst 24>;

			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "mc";

			phys = <&usbphy 0>;

			phy-names = "usb";

			extcon = <&usbphy 0>;

			status = "disabled";

		};



		usbphy: phy@01c19400 {

			compatible = "allwinner,sun8i-a33-usb-phy";

			reg = <0x01c19400 0x14>,

			      <0x01c1a800 0x4>;

			reg-names = "phy_ctrl",

				    "pmu1";

			clocks = <&usb_clk 8>,

				 <&usb_clk 9>;

			clock-names = "usb0_phy",

				      "usb1_phy";

			resets = <&usb_clk 0>,

				 <&usb_clk 1>;

			reset-names = "usb0_reset",

				      "usb1_reset";

			status = "disabled";

			#phy-cells = <1>;

		};

	};

};



&pio {