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Commit 4efd344e authored by Narendra Muppalla's avatar Narendra Muppalla Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: modify mdss mdp clock rates for sdm845 HW 



This change adds mdp clock rates for sdm845
V2 hardware, and correct mdp clock rate for V1 HW.

Change-Id: I20e2b387da20d1d1eb416a48f21b044990dd8908
Signed-off-by: default avatarNarendra Muppalla <NarendraM@codeaurora.org>
parent 1996ec83

arch/arm64/boot/dts/qcom/sdm845-sde.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ 
		clock-names = "gcc_iface", "gcc_bus", "iface_clk",

				"bus_clk", "core_clk", "vsync_clk";

		clock-rate = <0 0 0 0 300000000 19200000 0>;

		clock-max-rate = <0 0 0 0 430000000 19200000 0>;

		clock-max-rate = <0 0 0 0 412500000 19200000 0>;



		sde-vdd-supply = <&mdss_core_gdsc>;

arch/arm64/boot/dts/qcom/sdm845-v2.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -52,3 +52,7 @@ 
	qcom,spss-test-firmware-name = "spss2t";	/* 8 chars max */

	qcom,spss-prod-firmware-name = "spss2p";	/* 8 chars max */

};



&mdss_mdp {

	clock-max-rate = <0 0 0 0 430000000 19200000 0>;

};