Loading drivers/power/supply/qcom/qpnp-smb5.c +20 −13 Original line number Diff line number Diff line Loading @@ -1084,6 +1084,7 @@ static int smb5_batt_set_prop(struct power_supply *psy, { int rc = 0; struct smb_charger *chg = power_supply_get_drvdata(psy); bool enable; switch (prop) { case POWER_SUPPLY_PROP_STATUS: Loading @@ -1106,11 +1107,16 @@ static int smb5_batt_set_prop(struct power_supply *psy, vote(chg->fv_votable, BATT_PROFILE_VOTER, true, val->intval); break; case POWER_SUPPLY_PROP_STEP_CHARGING_ENABLED: enable = !!val->intval || chg->sw_jeita_enabled; rc = smblib_configure_wdog(chg, enable); if (rc == 0) chg->step_chg_enabled = !!val->intval; break; case POWER_SUPPLY_PROP_SW_JEITA_ENABLED: if (chg->sw_jeita_enabled != (!!val->intval)) { rc = smblib_disable_hw_jeita(chg, !!val->intval); enable = !!val->intval || chg->step_chg_enabled; rc |= smblib_configure_wdog(chg, enable); if (rc == 0) chg->sw_jeita_enabled = !!val->intval; } Loading Loading @@ -1481,6 +1487,10 @@ static int smb5_init_hw(struct smb5 *chip) return rc; } /* * configure the one time watchdong periodic interval and * disable "watchdog bite disable charging". */ val = (ilog2(chip->dt.wd_bark_time / 16) << BARK_WDOG_TIMEOUT_SHIFT) & BARK_WDOG_TIMEOUT_MASK; val |= BITE_WDOG_TIMEOUT_8S; Loading @@ -1493,18 +1503,6 @@ static int smb5_init_hw(struct smb5 *chip) return rc; } /* enable WD BARK and enable it on plugin */ rc = smblib_masked_write(chg, WD_CFG_REG, WATCHDOG_TRIGGER_AFP_EN_BIT | WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT, WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT); if (rc < 0) { pr_err("Couldn't configue WD config rc=%d\n", rc); return rc; } /* configure float charger options */ switch (chip->dt.float_option) { case FLOAT_DCP: Loading Loading @@ -1643,6 +1641,14 @@ static int smb5_init_hw(struct smb5 *chip) } } rc = smblib_configure_wdog(chg, chg->step_chg_enabled || chg->sw_jeita_enabled); if (rc < 0) { dev_err(chg->dev, "Couldn't configure watchdog rc=%d\n", rc); return rc; } return rc; } Loading Loading @@ -1892,6 +1898,7 @@ static struct smb_irq_info smb5_irqs[] = { [WDOG_BARK_IRQ] = { .name = "wdog-bark", .handler = wdog_bark_irq_handler, .wake = true, }, [AICL_FAIL_IRQ] = { .name = "aicl-fail", Loading drivers/power/supply/qcom/smb5-lib.c +21 −0 Original line number Diff line number Diff line Loading @@ -1682,6 +1682,27 @@ int smblib_disable_hw_jeita(struct smb_charger *chg, bool disable) return 0; } int smblib_configure_wdog(struct smb_charger *chg, bool enable) { int rc; u8 val = 0; if (enable) val = WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT; /* enable WD BARK and enable it on plugin */ rc = smblib_masked_write(chg, WD_CFG_REG, WATCHDOG_TRIGGER_AFP_EN_BIT | WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT, val); if (rc < 0) { pr_err("Couldn't configue WD config rc=%d\n", rc); return rc; } return 0; } /******************* * DC PSY GETTERS * *******************/ Loading drivers/power/supply/qcom/smb5-lib.h +1 −0 Original line number Diff line number Diff line Loading @@ -523,6 +523,7 @@ int smblib_get_prop_pr_swap_in_progress(struct smb_charger *chg, int smblib_set_prop_pr_swap_in_progress(struct smb_charger *chg, const union power_supply_propval *val); int smblib_stat_sw_override_cfg(struct smb_charger *chg, bool override); int smblib_configure_wdog(struct smb_charger *chg, bool enable); int smblib_init(struct smb_charger *chg); int smblib_deinit(struct smb_charger *chg); Loading drivers/power/supply/qcom/smb5-reg.h +5 −5 Original line number Diff line number Diff line Loading @@ -335,11 +335,6 @@ enum { #define AICL_CMD_REG (MISC_BASE + 0x44) #define RERUN_AICL_BIT BIT(0) #define SNARL_BARK_BITE_WD_CFG_REG (MISC_BASE + 0x43) #define BITE_WDOG_DISABLE_CHARGING_CFG_BIT BIT(7) #define BARK_WDOG_TIMEOUT_MASK GENMASK(3, 2) #define BITE_WDOG_TIMEOUT_MASK GENMASK(1, 0) #define MISC_SMB_EN_CMD_REG (MISC_BASE + 0x48) #define SMB_EN_OVERRIDE_VALUE_BIT BIT(4) #define SMB_EN_OVERRIDE_BIT BIT(3) Loading @@ -352,6 +347,11 @@ enum { #define BARK_WDOG_INT_EN_BIT BIT(6) #define WDOG_TIMER_EN_ON_PLUGIN_BIT BIT(1) #define SNARL_BARK_BITE_WD_CFG_REG (MISC_BASE + 0x53) #define BITE_WDOG_DISABLE_CHARGING_CFG_BIT BIT(7) #define BARK_WDOG_TIMEOUT_MASK GENMASK(3, 2) #define BITE_WDOG_TIMEOUT_MASK GENMASK(1, 0) #define MISC_SMB_CFG_REG (MISC_BASE + 0x90) #define SMB_EN_SEL_BIT BIT(4) #define CP_EN_POLARITY_CFG_BIT BIT(3) Loading Loading
drivers/power/supply/qcom/qpnp-smb5.c +20 −13 Original line number Diff line number Diff line Loading @@ -1084,6 +1084,7 @@ static int smb5_batt_set_prop(struct power_supply *psy, { int rc = 0; struct smb_charger *chg = power_supply_get_drvdata(psy); bool enable; switch (prop) { case POWER_SUPPLY_PROP_STATUS: Loading @@ -1106,11 +1107,16 @@ static int smb5_batt_set_prop(struct power_supply *psy, vote(chg->fv_votable, BATT_PROFILE_VOTER, true, val->intval); break; case POWER_SUPPLY_PROP_STEP_CHARGING_ENABLED: enable = !!val->intval || chg->sw_jeita_enabled; rc = smblib_configure_wdog(chg, enable); if (rc == 0) chg->step_chg_enabled = !!val->intval; break; case POWER_SUPPLY_PROP_SW_JEITA_ENABLED: if (chg->sw_jeita_enabled != (!!val->intval)) { rc = smblib_disable_hw_jeita(chg, !!val->intval); enable = !!val->intval || chg->step_chg_enabled; rc |= smblib_configure_wdog(chg, enable); if (rc == 0) chg->sw_jeita_enabled = !!val->intval; } Loading Loading @@ -1481,6 +1487,10 @@ static int smb5_init_hw(struct smb5 *chip) return rc; } /* * configure the one time watchdong periodic interval and * disable "watchdog bite disable charging". */ val = (ilog2(chip->dt.wd_bark_time / 16) << BARK_WDOG_TIMEOUT_SHIFT) & BARK_WDOG_TIMEOUT_MASK; val |= BITE_WDOG_TIMEOUT_8S; Loading @@ -1493,18 +1503,6 @@ static int smb5_init_hw(struct smb5 *chip) return rc; } /* enable WD BARK and enable it on plugin */ rc = smblib_masked_write(chg, WD_CFG_REG, WATCHDOG_TRIGGER_AFP_EN_BIT | WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT, WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT); if (rc < 0) { pr_err("Couldn't configue WD config rc=%d\n", rc); return rc; } /* configure float charger options */ switch (chip->dt.float_option) { case FLOAT_DCP: Loading Loading @@ -1643,6 +1641,14 @@ static int smb5_init_hw(struct smb5 *chip) } } rc = smblib_configure_wdog(chg, chg->step_chg_enabled || chg->sw_jeita_enabled); if (rc < 0) { dev_err(chg->dev, "Couldn't configure watchdog rc=%d\n", rc); return rc; } return rc; } Loading Loading @@ -1892,6 +1898,7 @@ static struct smb_irq_info smb5_irqs[] = { [WDOG_BARK_IRQ] = { .name = "wdog-bark", .handler = wdog_bark_irq_handler, .wake = true, }, [AICL_FAIL_IRQ] = { .name = "aicl-fail", Loading
drivers/power/supply/qcom/smb5-lib.c +21 −0 Original line number Diff line number Diff line Loading @@ -1682,6 +1682,27 @@ int smblib_disable_hw_jeita(struct smb_charger *chg, bool disable) return 0; } int smblib_configure_wdog(struct smb_charger *chg, bool enable) { int rc; u8 val = 0; if (enable) val = WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT; /* enable WD BARK and enable it on plugin */ rc = smblib_masked_write(chg, WD_CFG_REG, WATCHDOG_TRIGGER_AFP_EN_BIT | WDOG_TIMER_EN_ON_PLUGIN_BIT | BARK_WDOG_INT_EN_BIT, val); if (rc < 0) { pr_err("Couldn't configue WD config rc=%d\n", rc); return rc; } return 0; } /******************* * DC PSY GETTERS * *******************/ Loading
drivers/power/supply/qcom/smb5-lib.h +1 −0 Original line number Diff line number Diff line Loading @@ -523,6 +523,7 @@ int smblib_get_prop_pr_swap_in_progress(struct smb_charger *chg, int smblib_set_prop_pr_swap_in_progress(struct smb_charger *chg, const union power_supply_propval *val); int smblib_stat_sw_override_cfg(struct smb_charger *chg, bool override); int smblib_configure_wdog(struct smb_charger *chg, bool enable); int smblib_init(struct smb_charger *chg); int smblib_deinit(struct smb_charger *chg); Loading
drivers/power/supply/qcom/smb5-reg.h +5 −5 Original line number Diff line number Diff line Loading @@ -335,11 +335,6 @@ enum { #define AICL_CMD_REG (MISC_BASE + 0x44) #define RERUN_AICL_BIT BIT(0) #define SNARL_BARK_BITE_WD_CFG_REG (MISC_BASE + 0x43) #define BITE_WDOG_DISABLE_CHARGING_CFG_BIT BIT(7) #define BARK_WDOG_TIMEOUT_MASK GENMASK(3, 2) #define BITE_WDOG_TIMEOUT_MASK GENMASK(1, 0) #define MISC_SMB_EN_CMD_REG (MISC_BASE + 0x48) #define SMB_EN_OVERRIDE_VALUE_BIT BIT(4) #define SMB_EN_OVERRIDE_BIT BIT(3) Loading @@ -352,6 +347,11 @@ enum { #define BARK_WDOG_INT_EN_BIT BIT(6) #define WDOG_TIMER_EN_ON_PLUGIN_BIT BIT(1) #define SNARL_BARK_BITE_WD_CFG_REG (MISC_BASE + 0x53) #define BITE_WDOG_DISABLE_CHARGING_CFG_BIT BIT(7) #define BARK_WDOG_TIMEOUT_MASK GENMASK(3, 2) #define BITE_WDOG_TIMEOUT_MASK GENMASK(1, 0) #define MISC_SMB_CFG_REG (MISC_BASE + 0x90) #define SMB_EN_SEL_BIT BIT(4) #define CP_EN_POLARITY_CFG_BIT BIT(3) Loading