Loading drivers/gpu/drm/msm/msm_drv.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -123,6 +123,7 @@ enum msm_mdp_plane_property { PLANE_PROP_SRC_CONFIG, PLANE_PROP_FB_TRANSLATION_MODE, PLANE_PROP_MULTIRECT_MODE, PLANE_PROP_LAYOUT, /* total # of properties */ PLANE_PROP_COUNT Loading drivers/gpu/drm/msm/sde/sde_connector.c +4 −1 Original line number Diff line number Diff line /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -48,6 +48,9 @@ static const struct drm_prop_enum_list e_topology_name[] = { {SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, "sde_dualpipemerge_dsc"}, {SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, "sde_dualpipe_dscmerge"}, {SDE_RM_TOPOLOGY_PPSPLIT, "sde_ppsplit"}, {SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE, "sde_quadpipemerge"}, {SDE_RM_TOPOLOGY_QUADPIPE_DSCMERGE, "sde_quadpipe_dscmerge"}, {SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC, "sde_quadpipe_3dmerge_dsc"} }; static const struct drm_prop_enum_list e_topology_control[] = { {SDE_RM_TOPCTL_RESERVE_LOCK, "reserve_lock"}, Loading drivers/gpu/drm/msm/sde/sde_crtc.c +45 −12 Original line number Diff line number Diff line /* * Copyright (c) 2014-2018 The Linux Foundation. All rights reserved. * Copyright (c) 2014-2019 The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -1229,7 +1229,7 @@ static int _sde_crtc_check_rois_centered_and_symmetric(struct drm_crtc *crtc, { struct sde_crtc *sde_crtc; struct sde_crtc_state *crtc_state; const struct sde_rect *roi[CRTC_DUAL_MIXERS]; const struct sde_rect *roi[MAX_MIXERS_PER_CRTC]; if (!crtc || !state) return -EINVAL; Loading @@ -1237,7 +1237,7 @@ static int _sde_crtc_check_rois_centered_and_symmetric(struct drm_crtc *crtc, sde_crtc = to_sde_crtc(crtc); crtc_state = to_sde_crtc_state(state); if (sde_crtc->num_mixers > CRTC_DUAL_MIXERS) { if (sde_crtc->num_mixers > MAX_MIXERS_PER_CRTC) { SDE_ERROR("%s: unsupported number of mixers: %d\n", sde_crtc->name, sde_crtc->num_mixers); return -EINVAL; Loading Loading @@ -1429,7 +1429,7 @@ static void _sde_crtc_program_lm_output_roi(struct drm_crtc *crtc) struct sde_crtc_state *crtc_state; const struct sde_rect *lm_roi; struct sde_hw_mixer *hw_lm; int lm_idx, lm_horiz_position; int lm_idx; if (!crtc) return; Loading @@ -1437,7 +1437,6 @@ static void _sde_crtc_program_lm_output_roi(struct drm_crtc *crtc) sde_crtc = to_sde_crtc(crtc); crtc_state = to_sde_crtc_state(crtc->state); lm_horiz_position = 0; for (lm_idx = 0; lm_idx < sde_crtc->num_mixers; lm_idx++) { struct sde_hw_mixer_cfg cfg; Loading @@ -1452,11 +1451,10 @@ static void _sde_crtc_program_lm_output_roi(struct drm_crtc *crtc) hw_lm->cfg.out_width = lm_roi->w; hw_lm->cfg.out_height = lm_roi->h; hw_lm->cfg.right_mixer = lm_horiz_position; cfg.out_width = lm_roi->w; cfg.out_height = lm_roi->h; cfg.right_mixer = lm_horiz_position++; cfg.right_mixer = hw_lm->cfg.right_mixer; cfg.flags = 0; hw_lm->ops.setup_mixer_out(hw_lm, &cfg); } Loading Loading @@ -1605,6 +1603,8 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc, sde_plane_pipe(plane); stage_cfg->multirect_index[pstate->stage][stage_idx] = pstate->multirect_index; stage_cfg->layout_index[pstate->stage][stage_idx] = sde_plane_get_property(pstate, PLANE_PROP_LAYOUT); SDE_EVT32(DRMID(crtc), DRMID(plane), stage_idx, sde_plane_pipe(plane) - SSPP_VIG0, pstate->stage, Loading Loading @@ -1724,7 +1724,7 @@ static void _sde_crtc_blend_setup(struct drm_crtc *crtc, SDE_DEBUG("%s\n", sde_crtc->name); if (sde_crtc->num_mixers > CRTC_DUAL_MIXERS) { if (sde_crtc->num_mixers > MAX_MIXERS_PER_CRTC) { SDE_ERROR("invalid number mixers: %d\n", sde_crtc->num_mixers); return; } Loading Loading @@ -1784,6 +1784,7 @@ static void _sde_crtc_blend_setup(struct drm_crtc *crtc, mixer[i].flush_mask); ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, mixer[i].hw_lm->cfg.flags, &sde_crtc->stage_cfg); } Loading Loading @@ -2068,7 +2069,7 @@ static int _sde_validate_hw_resources(struct sde_crtc *sde_crtc) } if (!sde_crtc->num_mixers || sde_crtc->num_mixers > CRTC_DUAL_MIXERS) { sde_crtc->num_mixers > MAX_MIXERS_PER_CRTC) { SDE_ERROR("%s: invalid number mixers: %d\n", sde_crtc->name, sde_crtc->num_mixers); SDE_EVT32(DRMID(&sde_crtc->base), sde_crtc->num_mixers, Loading Loading @@ -2961,31 +2962,46 @@ static void _sde_crtc_setup_mixer_for_encoder( struct sde_rm *rm = &sde_kms->rm; struct sde_crtc_mixer *mixer; struct sde_hw_ctl *last_valid_ctl = NULL; int i; struct sde_rm_hw_iter lm_iter, ctl_iter, dspp_iter, ds_iter; u64 mixer_per_ctl = 0; u32 reuse_ctl = 0; int i; sde_rm_init_hw_iter(&lm_iter, enc->base.id, SDE_HW_BLK_LM); sde_rm_init_hw_iter(&ctl_iter, enc->base.id, SDE_HW_BLK_CTL); sde_rm_init_hw_iter(&dspp_iter, enc->base.id, SDE_HW_BLK_DSPP); sde_rm_init_hw_iter(&ds_iter, enc->base.id, SDE_HW_BLK_DS); reuse_ctl = sde_rm_get_hw_count(rm, enc->base.id, SDE_HW_BLK_CTL); mixer_per_ctl = sde_rm_get_hw_count(rm, enc->base.id, SDE_HW_BLK_LM); do_div(mixer_per_ctl, reuse_ctl); if (!mixer_per_ctl) { SDE_DEBUG("no valid lm/ctl count:%d\n", reuse_ctl); return; } reuse_ctl = 0; /* Set up all the mixers and ctls reserved by this encoder */ for (i = sde_crtc->num_mixers; i < ARRAY_SIZE(sde_crtc->mixers); i++) { mixer = &sde_crtc->mixers[i]; if (!sde_rm_get_hw(rm, &lm_iter)) break; mixer->hw_lm = (struct sde_hw_mixer *)lm_iter.hw; /* CTL may be <= LMs, if <, multiple LMs controlled by 1 CTL */ if (!sde_rm_get_hw(rm, &ctl_iter)) { SDE_DEBUG("no ctl assigned to lm %d, using previous\n", if (reuse_ctl || !sde_rm_get_hw(rm, &ctl_iter)) { SDE_DEBUG("no ctl assigned to lm %d using previous\n", mixer->hw_lm->idx - LM_0); mixer->hw_ctl = last_valid_ctl; } else { mixer->hw_ctl = (struct sde_hw_ctl *)ctl_iter.hw; last_valid_ctl = mixer->hw_ctl; reuse_ctl = mixer_per_ctl; } if (reuse_ctl) reuse_ctl--; /* Shouldn't happen, mixers are always >= ctls */ if (!mixer->hw_ctl) { Loading @@ -2994,6 +3010,14 @@ static void _sde_crtc_setup_mixer_for_encoder( return; } if (sde_crtc->num_mixers < mixer_per_ctl) mixer->hw_lm->cfg.flags |= SDE_MIXER_LAYOUT_LEFT; else mixer->hw_lm->cfg.flags |= SDE_MIXER_LAYOUT_RIGHT; mixer->hw_lm->cfg.right_mixer = (sde_crtc->num_mixers & 1) ? true : false; /* Dspp may be null */ (void) sde_rm_get_hw(rm, &dspp_iter); mixer->hw_dspp = (struct sde_hw_dspp *)dspp_iter.hw; Loading Loading @@ -4814,12 +4838,21 @@ static int sde_crtc_atomic_check(struct drm_crtc *crtc, struct sde_rect left_rect, right_rect; int32_t left_pid, right_pid; int32_t stage; int32_t left_layout, right_layout; prv_pstate = &pstates[i - 1]; cur_pstate = &pstates[i]; if (prv_pstate->stage != cur_pstate->stage) continue; left_layout = sde_plane_get_property(prv_pstate->sde_pstate, PLANE_PROP_LAYOUT); right_layout = sde_plane_get_property(cur_pstate->sde_pstate, PLANE_PROP_LAYOUT); if (left_layout != right_layout) continue; stage = cur_pstate->stage; left_pid = prv_pstate->sde_pstate->base.plane->base.id; Loading drivers/gpu/drm/msm/sde/sde_crtc.h +5 −6 Original line number Diff line number Diff line Loading @@ -230,7 +230,7 @@ struct sde_crtc { u32 num_ctls; u32 num_mixers; bool mixers_swapped; struct sde_crtc_mixer mixers[CRTC_DUAL_MIXERS]; struct sde_crtc_mixer mixers[MAX_MIXERS_PER_CRTC]; struct drm_pending_vblank_event *event; u32 vsync_count; Loading Loading @@ -280,7 +280,7 @@ struct sde_crtc { spinlock_t event_lock; bool misr_enable; u32 misr_frame_count; u32 misr_data[CRTC_DUAL_MIXERS]; u32 misr_data[MAX_MIXERS_PER_CRTC]; bool enable_sui_enhancement; Loading Loading @@ -405,8 +405,8 @@ struct sde_crtc_state { bool is_ppsplit; struct sde_rect crtc_roi; struct sde_rect lm_bounds[CRTC_DUAL_MIXERS]; struct sde_rect lm_roi[CRTC_DUAL_MIXERS]; struct sde_rect lm_bounds[MAX_MIXERS_PER_CRTC]; struct sde_rect lm_roi[MAX_MIXERS_PER_CRTC]; struct msm_roi_list user_roi_list; struct msm_property_state property_state; Loading Loading @@ -483,8 +483,7 @@ static inline int sde_crtc_get_mixer_width(struct sde_crtc *sde_crtc, if (cstate->num_ds_enabled) mixer_width = cstate->ds_cfg[0].lm_width; else mixer_width = (sde_crtc->num_mixers == CRTC_DUAL_MIXERS ? mode->hdisplay / CRTC_DUAL_MIXERS : mode->hdisplay); mixer_width = mode->hdisplay / sde_crtc->num_mixers; return mixer_width; } Loading drivers/gpu/drm/msm/sde/sde_encoder.c +7 −2 Original line number Diff line number Diff line /* * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -1406,6 +1406,9 @@ static int _sde_encoder_dsc_setup(struct sde_encoder_virt *sde_enc, return -EINVAL; } params->num_channels = sde_rm_get_topology_num_encoders(topology); SDE_DEBUG_ENC(sde_enc, "topology:%d\n", topology); SDE_EVT32(DRMID(&sde_enc->base), topology, sde_enc->cur_conn_roi.x, Loading @@ -1432,6 +1435,7 @@ static int _sde_encoder_dsc_setup(struct sde_encoder_virt *sde_enc, ret = _sde_encoder_dsc_2_lm_2_enc_1_intf(sde_enc, params); break; case SDE_RM_TOPOLOGY_DUALPIPE_DSC: case SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC: ret = _sde_encoder_dsc_2_lm_2_enc_2_intf(sde_enc, params); break; default: Loading Loading @@ -4124,7 +4128,8 @@ int sde_encoder_helper_reset_mixers(struct sde_encoder_phys *phys_enc, /* only enable border color on LM */ if (phys_enc->hw_ctl->ops.setup_blendstage) phys_enc->hw_ctl->ops.setup_blendstage( phys_enc->hw_ctl, hw_lm->idx, NULL); phys_enc->hw_ctl, hw_lm->cfg.flags, hw_lm->idx, NULL); } if (!lm_valid) { Loading Loading
drivers/gpu/drm/msm/msm_drv.h +2 −1 Original line number Diff line number Diff line /* * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -123,6 +123,7 @@ enum msm_mdp_plane_property { PLANE_PROP_SRC_CONFIG, PLANE_PROP_FB_TRANSLATION_MODE, PLANE_PROP_MULTIRECT_MODE, PLANE_PROP_LAYOUT, /* total # of properties */ PLANE_PROP_COUNT Loading
drivers/gpu/drm/msm/sde/sde_connector.c +4 −1 Original line number Diff line number Diff line /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -48,6 +48,9 @@ static const struct drm_prop_enum_list e_topology_name[] = { {SDE_RM_TOPOLOGY_DUALPIPE_3DMERGE_DSC, "sde_dualpipemerge_dsc"}, {SDE_RM_TOPOLOGY_DUALPIPE_DSCMERGE, "sde_dualpipe_dscmerge"}, {SDE_RM_TOPOLOGY_PPSPLIT, "sde_ppsplit"}, {SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE, "sde_quadpipemerge"}, {SDE_RM_TOPOLOGY_QUADPIPE_DSCMERGE, "sde_quadpipe_dscmerge"}, {SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC, "sde_quadpipe_3dmerge_dsc"} }; static const struct drm_prop_enum_list e_topology_control[] = { {SDE_RM_TOPCTL_RESERVE_LOCK, "reserve_lock"}, Loading
drivers/gpu/drm/msm/sde/sde_crtc.c +45 −12 Original line number Diff line number Diff line /* * Copyright (c) 2014-2018 The Linux Foundation. All rights reserved. * Copyright (c) 2014-2019 The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -1229,7 +1229,7 @@ static int _sde_crtc_check_rois_centered_and_symmetric(struct drm_crtc *crtc, { struct sde_crtc *sde_crtc; struct sde_crtc_state *crtc_state; const struct sde_rect *roi[CRTC_DUAL_MIXERS]; const struct sde_rect *roi[MAX_MIXERS_PER_CRTC]; if (!crtc || !state) return -EINVAL; Loading @@ -1237,7 +1237,7 @@ static int _sde_crtc_check_rois_centered_and_symmetric(struct drm_crtc *crtc, sde_crtc = to_sde_crtc(crtc); crtc_state = to_sde_crtc_state(state); if (sde_crtc->num_mixers > CRTC_DUAL_MIXERS) { if (sde_crtc->num_mixers > MAX_MIXERS_PER_CRTC) { SDE_ERROR("%s: unsupported number of mixers: %d\n", sde_crtc->name, sde_crtc->num_mixers); return -EINVAL; Loading Loading @@ -1429,7 +1429,7 @@ static void _sde_crtc_program_lm_output_roi(struct drm_crtc *crtc) struct sde_crtc_state *crtc_state; const struct sde_rect *lm_roi; struct sde_hw_mixer *hw_lm; int lm_idx, lm_horiz_position; int lm_idx; if (!crtc) return; Loading @@ -1437,7 +1437,6 @@ static void _sde_crtc_program_lm_output_roi(struct drm_crtc *crtc) sde_crtc = to_sde_crtc(crtc); crtc_state = to_sde_crtc_state(crtc->state); lm_horiz_position = 0; for (lm_idx = 0; lm_idx < sde_crtc->num_mixers; lm_idx++) { struct sde_hw_mixer_cfg cfg; Loading @@ -1452,11 +1451,10 @@ static void _sde_crtc_program_lm_output_roi(struct drm_crtc *crtc) hw_lm->cfg.out_width = lm_roi->w; hw_lm->cfg.out_height = lm_roi->h; hw_lm->cfg.right_mixer = lm_horiz_position; cfg.out_width = lm_roi->w; cfg.out_height = lm_roi->h; cfg.right_mixer = lm_horiz_position++; cfg.right_mixer = hw_lm->cfg.right_mixer; cfg.flags = 0; hw_lm->ops.setup_mixer_out(hw_lm, &cfg); } Loading Loading @@ -1605,6 +1603,8 @@ static void _sde_crtc_blend_setup_mixer(struct drm_crtc *crtc, sde_plane_pipe(plane); stage_cfg->multirect_index[pstate->stage][stage_idx] = pstate->multirect_index; stage_cfg->layout_index[pstate->stage][stage_idx] = sde_plane_get_property(pstate, PLANE_PROP_LAYOUT); SDE_EVT32(DRMID(crtc), DRMID(plane), stage_idx, sde_plane_pipe(plane) - SSPP_VIG0, pstate->stage, Loading Loading @@ -1724,7 +1724,7 @@ static void _sde_crtc_blend_setup(struct drm_crtc *crtc, SDE_DEBUG("%s\n", sde_crtc->name); if (sde_crtc->num_mixers > CRTC_DUAL_MIXERS) { if (sde_crtc->num_mixers > MAX_MIXERS_PER_CRTC) { SDE_ERROR("invalid number mixers: %d\n", sde_crtc->num_mixers); return; } Loading Loading @@ -1784,6 +1784,7 @@ static void _sde_crtc_blend_setup(struct drm_crtc *crtc, mixer[i].flush_mask); ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, mixer[i].hw_lm->cfg.flags, &sde_crtc->stage_cfg); } Loading Loading @@ -2068,7 +2069,7 @@ static int _sde_validate_hw_resources(struct sde_crtc *sde_crtc) } if (!sde_crtc->num_mixers || sde_crtc->num_mixers > CRTC_DUAL_MIXERS) { sde_crtc->num_mixers > MAX_MIXERS_PER_CRTC) { SDE_ERROR("%s: invalid number mixers: %d\n", sde_crtc->name, sde_crtc->num_mixers); SDE_EVT32(DRMID(&sde_crtc->base), sde_crtc->num_mixers, Loading Loading @@ -2961,31 +2962,46 @@ static void _sde_crtc_setup_mixer_for_encoder( struct sde_rm *rm = &sde_kms->rm; struct sde_crtc_mixer *mixer; struct sde_hw_ctl *last_valid_ctl = NULL; int i; struct sde_rm_hw_iter lm_iter, ctl_iter, dspp_iter, ds_iter; u64 mixer_per_ctl = 0; u32 reuse_ctl = 0; int i; sde_rm_init_hw_iter(&lm_iter, enc->base.id, SDE_HW_BLK_LM); sde_rm_init_hw_iter(&ctl_iter, enc->base.id, SDE_HW_BLK_CTL); sde_rm_init_hw_iter(&dspp_iter, enc->base.id, SDE_HW_BLK_DSPP); sde_rm_init_hw_iter(&ds_iter, enc->base.id, SDE_HW_BLK_DS); reuse_ctl = sde_rm_get_hw_count(rm, enc->base.id, SDE_HW_BLK_CTL); mixer_per_ctl = sde_rm_get_hw_count(rm, enc->base.id, SDE_HW_BLK_LM); do_div(mixer_per_ctl, reuse_ctl); if (!mixer_per_ctl) { SDE_DEBUG("no valid lm/ctl count:%d\n", reuse_ctl); return; } reuse_ctl = 0; /* Set up all the mixers and ctls reserved by this encoder */ for (i = sde_crtc->num_mixers; i < ARRAY_SIZE(sde_crtc->mixers); i++) { mixer = &sde_crtc->mixers[i]; if (!sde_rm_get_hw(rm, &lm_iter)) break; mixer->hw_lm = (struct sde_hw_mixer *)lm_iter.hw; /* CTL may be <= LMs, if <, multiple LMs controlled by 1 CTL */ if (!sde_rm_get_hw(rm, &ctl_iter)) { SDE_DEBUG("no ctl assigned to lm %d, using previous\n", if (reuse_ctl || !sde_rm_get_hw(rm, &ctl_iter)) { SDE_DEBUG("no ctl assigned to lm %d using previous\n", mixer->hw_lm->idx - LM_0); mixer->hw_ctl = last_valid_ctl; } else { mixer->hw_ctl = (struct sde_hw_ctl *)ctl_iter.hw; last_valid_ctl = mixer->hw_ctl; reuse_ctl = mixer_per_ctl; } if (reuse_ctl) reuse_ctl--; /* Shouldn't happen, mixers are always >= ctls */ if (!mixer->hw_ctl) { Loading @@ -2994,6 +3010,14 @@ static void _sde_crtc_setup_mixer_for_encoder( return; } if (sde_crtc->num_mixers < mixer_per_ctl) mixer->hw_lm->cfg.flags |= SDE_MIXER_LAYOUT_LEFT; else mixer->hw_lm->cfg.flags |= SDE_MIXER_LAYOUT_RIGHT; mixer->hw_lm->cfg.right_mixer = (sde_crtc->num_mixers & 1) ? true : false; /* Dspp may be null */ (void) sde_rm_get_hw(rm, &dspp_iter); mixer->hw_dspp = (struct sde_hw_dspp *)dspp_iter.hw; Loading Loading @@ -4814,12 +4838,21 @@ static int sde_crtc_atomic_check(struct drm_crtc *crtc, struct sde_rect left_rect, right_rect; int32_t left_pid, right_pid; int32_t stage; int32_t left_layout, right_layout; prv_pstate = &pstates[i - 1]; cur_pstate = &pstates[i]; if (prv_pstate->stage != cur_pstate->stage) continue; left_layout = sde_plane_get_property(prv_pstate->sde_pstate, PLANE_PROP_LAYOUT); right_layout = sde_plane_get_property(cur_pstate->sde_pstate, PLANE_PROP_LAYOUT); if (left_layout != right_layout) continue; stage = cur_pstate->stage; left_pid = prv_pstate->sde_pstate->base.plane->base.id; Loading
drivers/gpu/drm/msm/sde/sde_crtc.h +5 −6 Original line number Diff line number Diff line Loading @@ -230,7 +230,7 @@ struct sde_crtc { u32 num_ctls; u32 num_mixers; bool mixers_swapped; struct sde_crtc_mixer mixers[CRTC_DUAL_MIXERS]; struct sde_crtc_mixer mixers[MAX_MIXERS_PER_CRTC]; struct drm_pending_vblank_event *event; u32 vsync_count; Loading Loading @@ -280,7 +280,7 @@ struct sde_crtc { spinlock_t event_lock; bool misr_enable; u32 misr_frame_count; u32 misr_data[CRTC_DUAL_MIXERS]; u32 misr_data[MAX_MIXERS_PER_CRTC]; bool enable_sui_enhancement; Loading Loading @@ -405,8 +405,8 @@ struct sde_crtc_state { bool is_ppsplit; struct sde_rect crtc_roi; struct sde_rect lm_bounds[CRTC_DUAL_MIXERS]; struct sde_rect lm_roi[CRTC_DUAL_MIXERS]; struct sde_rect lm_bounds[MAX_MIXERS_PER_CRTC]; struct sde_rect lm_roi[MAX_MIXERS_PER_CRTC]; struct msm_roi_list user_roi_list; struct msm_property_state property_state; Loading Loading @@ -483,8 +483,7 @@ static inline int sde_crtc_get_mixer_width(struct sde_crtc *sde_crtc, if (cstate->num_ds_enabled) mixer_width = cstate->ds_cfg[0].lm_width; else mixer_width = (sde_crtc->num_mixers == CRTC_DUAL_MIXERS ? mode->hdisplay / CRTC_DUAL_MIXERS : mode->hdisplay); mixer_width = mode->hdisplay / sde_crtc->num_mixers; return mixer_width; } Loading
drivers/gpu/drm/msm/sde/sde_encoder.c +7 −2 Original line number Diff line number Diff line /* * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. * Copyright (C) 2013 Red Hat * Author: Rob Clark <robdclark@gmail.com> * Loading Loading @@ -1406,6 +1406,9 @@ static int _sde_encoder_dsc_setup(struct sde_encoder_virt *sde_enc, return -EINVAL; } params->num_channels = sde_rm_get_topology_num_encoders(topology); SDE_DEBUG_ENC(sde_enc, "topology:%d\n", topology); SDE_EVT32(DRMID(&sde_enc->base), topology, sde_enc->cur_conn_roi.x, Loading @@ -1432,6 +1435,7 @@ static int _sde_encoder_dsc_setup(struct sde_encoder_virt *sde_enc, ret = _sde_encoder_dsc_2_lm_2_enc_1_intf(sde_enc, params); break; case SDE_RM_TOPOLOGY_DUALPIPE_DSC: case SDE_RM_TOPOLOGY_QUADPIPE_3DMERGE_DSC: ret = _sde_encoder_dsc_2_lm_2_enc_2_intf(sde_enc, params); break; default: Loading Loading @@ -4124,7 +4128,8 @@ int sde_encoder_helper_reset_mixers(struct sde_encoder_phys *phys_enc, /* only enable border color on LM */ if (phys_enc->hw_ctl->ops.setup_blendstage) phys_enc->hw_ctl->ops.setup_blendstage( phys_enc->hw_ctl, hw_lm->idx, NULL); phys_enc->hw_ctl, hw_lm->cfg.flags, hw_lm->idx, NULL); } if (!lm_valid) { Loading