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Commit 4e270e9b authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon: fixup further bus mastering confusion.



rs400/480 are like previous chips not like rs6xx chips.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 65e082c9
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+8 −7
Original line number Diff line number Diff line
@@ -653,15 +653,16 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
	RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);

	/* Turn on bus mastering */
	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
	if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
	    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
		/* rs400, rs690/rs740 */
		tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS;
		/* rs600/rs690/rs740 */
		tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
		RADEON_WRITE(RADEON_BUS_CNTL, tmp);
	} else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
		    ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) {
		/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
	} else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
		   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
		/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
		tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
		RADEON_WRITE(RADEON_BUS_CNTL, tmp);
	} /* PCIE cards appears to not need this */
+6 −6
Original line number Diff line number Diff line
@@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
 * handling, not bus mastering itself.
 */
#define RADEON_BUS_CNTL			0x0030
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
#	define RADEON_BUS_MASTER_DIS		(1 << 6)
/* rs400, rs690/rs740 */
#	define RS400_BUS_MASTER_DIS		(1 << 14)
#	define RS400_MSI_REARM		        (1 << 20)
/* see RS480_MSI_REARM in AIC_CNTL for rs480 */
/* rs600/rs690/rs740 */
#	define RS600_BUS_MASTER_DIS		(1 << 14)
#	define RS600_MSI_REARM		        (1 << 20)
/* see RS400_MSI_REARM in AIC_CNTL for rs480 */

#define RADEON_BUS_CNTL1		0x0034
#	define RADEON_PMI_BM_DIS		(1 << 2)
@@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,

#define RADEON_AIC_CNTL			0x01d0
#	define RADEON_PCIGART_TRANSLATE_EN	(1 << 0)
#	define RS480_MSI_REARM	                (1 << 3)
#	define RS400_MSI_REARM	                (1 << 3)
#define RADEON_AIC_STAT			0x01d4
#define RADEON_AIC_PT_BASE		0x01d8
#define RADEON_AIC_LO_ADDR		0x01dc