Merge branch 'next-gpio-update' into for-next (4d9374f3) · Commits · e / devices / android_kernel_fairphone_FP3

arch/arm/mach-s3c64xx/dev-audio.c

+18 −46

Original line number	Original line	Diff line number	Diff line
	@@ -22,44 +22,33 @@
	#include <plat/audio.h>		#include <plat/audio.h>
	#include <plat/gpio-cfg.h>		#include <plat/gpio-cfg.h>

	#include <mach/gpio-bank-c.h>
	#include <mach/gpio-bank-d.h>
	#include <mach/gpio-bank-e.h>
	#include <mach/gpio-bank-h.h>

	static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)		static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
	{		{
			unsigned int base;

	switch (pdev->id) {		switch (pdev->id) {
	case 0:		case 0:
	s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);		base = S3C64XX_GPD(0);
	s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
	s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
	s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
	s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
	break;		break;
	case 1:		case 1:
	s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);		base = S3C64XX_GPE(0);
	s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);		break;
	s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
	s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
	s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
	default:		default:
	printk(KERN_DEBUG "Invalid I2S Controller number!");		printk(KERN_DEBUG "Invalid I2S Controller number!");
	return -EINVAL;		return -EINVAL;
	}		}

			s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3));

	return 0;		return 0;
	}		}

	static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)		static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
	{		{
	s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);		s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5));
	s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);		s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5));
	s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);		s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5));
	s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);		s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(5));
	s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
	s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
	s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);

	return 0;		return 0;
	}		}
	@@ -168,26 +157,21 @@ EXPORT_SYMBOL(s3c64xx_device_iisv4);

	static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)		static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
	{		{
			unsigned int base;

	switch (pdev->id) {		switch (pdev->id) {
	case 0:		case 0:
	s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);		base = S3C64XX_GPD(0);
	s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
	s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
	s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
	s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
	break;		break;
	case 1:		case 1:
	s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);		base = S3C64XX_GPE(0);
	s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
	s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
	s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
	s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
	break;		break;
	default:		default:
	printk(KERN_DEBUG "Invalid PCM Controller number!");		printk(KERN_DEBUG "Invalid PCM Controller number!");
	return -EINVAL;		return -EINVAL;
	}		}

			s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2));
	return 0;		return 0;
	}		}

	@@ -261,24 +245,12 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1);

	static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)		static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
	{		{
	s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK);		return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4));
	s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET);
	s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC);
	s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI);
	s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO);

	return 0;
	}		}

	static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)		static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
	{		{
	s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK);		return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4));
	s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET);
	s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC);
	s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI);
	s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO);

	return 0;
	}		}

	static struct resource s3c64xx_ac97_resource[] = {		static struct resource s3c64xx_ac97_resource[] = {

arch/arm/mach-s3c64xx/setup-fb-24bpp.c

+2 −11

Original line number	Original line	Diff line number	Diff line
	@@ -23,15 +23,6 @@

	extern void s3c64xx_fb_gpio_setup_24bpp(void)		extern void s3c64xx_fb_gpio_setup_24bpp(void)
	{		{
	unsigned int gpio;		s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
			s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
	for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}

	for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}
	}		}

arch/arm/mach-s3c64xx/setup-ide.c

+3 −7

Original line number	Original line	Diff line number	Diff line
	@@ -21,7 +21,6 @@
	void s3c64xx_ide_setup_gpio(void)		void s3c64xx_ide_setup_gpio(void)
	{		{
	u32 reg;		u32 reg;
	u32 gpio = 0;

	reg = readl(S3C_MEM_SYS_CFG) & (~0x3f);		reg = readl(S3C_MEM_SYS_CFG) & (~0x3f);

	@@ -32,15 +31,12 @@ void s3c64xx_ide_setup_gpio(void)
	s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4));		s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4));

	/* Set XhiDATA[15:0] pins as CF Data[15:0] */		/* Set XhiDATA[15:0] pins as CF Data[15:0] */
	for (gpio = S3C64XX_GPK(0); gpio <= S3C64XX_GPK(15); gpio++)		s3c_gpio_cfgpin_range(S3C64XX_GPK(0), 16, S3C_GPIO_SFN(5));
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(5));

	/* Set XhiADDR[2:0] pins as CF ADDR[2:0] */		/* Set XhiADDR[2:0] pins as CF ADDR[2:0] */
	for (gpio = S3C64XX_GPL(0); gpio <= S3C64XX_GPL(2); gpio++)		s3c_gpio_cfgpin_range(S3C64XX_GPL(0), 3, S3C_GPIO_SFN(6));
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6));

	/* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */		/* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */
	s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1));		s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1));
	for (gpio = S3C64XX_GPM(0); gpio <= S3C64XX_GPM(4); gpio++)		s3c_gpio_cfgpin_range(S3C64XX_GPM(0), 5, S3C_GPIO_SFN(6));
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6));
	}		}

arch/arm/mach-s3c64xx/setup-keypad.c

+2 −13

Original line number	Original line	Diff line number	Diff line
	@@ -15,20 +15,9 @@

	void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)		void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
	{		{
	unsigned int gpio;
	unsigned int end;

	/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */		/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
	end = S3C64XX_GPK(8 + rows);		s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), 8 + rows, S3C_GPIO_SFN(3));
	for (gpio = S3C64XX_GPK(8); gpio < end; gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}

	/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */		/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
	end = S3C64XX_GPL(0 + cols);		s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
	for (gpio = S3C64XX_GPL(0); gpio < end; gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}
	}		}

arch/arm/mach-s3c64xx/setup-sdhci-gpio.c

+8 −33

Original line number	Original line	Diff line number	Diff line
	@@ -24,16 +24,9 @@
	void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)		void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
	{		{
	struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;		struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
	unsigned int gpio;
	unsigned int end;

	end = S3C64XX_GPG(2 + width);		/* Set all the necessary GPG pins to special-function 2 */
			s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
	/* Set all the necessary GPG pins to special-function 0 */
	for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}

	if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {		if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);		s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
	@@ -44,16 +37,9 @@ void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
	void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)		void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
	{		{
	struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;		struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
	unsigned int gpio;
	unsigned int end;

	end = S3C64XX_GPH(2 + width);		/* Set all the necessary GPH pins to special-function 2 */
			s3c_gpio_cfgrange_nopull(S3C64XX_GPH(0), 2 + width, S3C_GPIO_SFN(2));
	/* Set all the necessary GPG pins to special-function 0 */
	for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}

	if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {		if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);		s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
	@@ -63,20 +49,9 @@ void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)

	void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)		void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
	{		{
	unsigned int gpio;		/* Set all the necessary GPH pins to special-function 3 */
	unsigned int end;		s3c_gpio_cfgrange_nopull(S3C64XX_GPH(6), width, S3C_GPIO_SFN(3));

	end = S3C64XX_GPH(6 + width);		/* Set all the necessary GPC pins to special-function 3 */
			s3c_gpio_cfgrange_nopull(S3C64XX_GPC(4), 2, S3C_GPIO_SFN(3));
	/* Set all the necessary GPH pins to special-function 1 */
	for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}

	/* Set all the necessary GPC pins to special-function 1 */
	for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) {
	s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
	s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
	}
	}		}