Loading drivers/gpu/msm/adreno-gpulist.h +17 −0 Original line number Diff line number Diff line Loading @@ -340,4 +340,21 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .gpmu_tsens = 0x000C000D, .max_power = 5448, }, { .gpurev = ADRENO_REV_A615, .core = 6, .major = 1, .minor = 5, .patchid = ANY_ID, .features = ADRENO_64BIT | ADRENO_RPMH, .sqefw_name = "a630_sqe.fw", .zap_name = "a615_zap", .gpudev = &adreno_a6xx_gpudev, .gmem_size = SZ_512K, .num_protected_regs = 0x20, .busy_mask = 0xFFFFFFFE, .gpmufw_name = "a630_gmu.bin", .gpmu_major = 0x0, .gpmu_minor = 0x005, }, }; drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -195,6 +195,7 @@ enum adreno_gpurev { ADRENO_REV_A512 = 512, ADRENO_REV_A530 = 530, ADRENO_REV_A540 = 540, ADRENO_REV_A615 = 615, ADRENO_REV_A630 = 630, }; Loading Loading @@ -1144,6 +1145,7 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev) ADRENO_GPUREV(adreno_dev) < 700; } ADRENO_TARGET(a615, ADRENO_REV_A615) ADRENO_TARGET(a630, ADRENO_REV_A630) static inline int adreno_is_a630v1(struct adreno_device *adreno_dev) Loading drivers/gpu/msm/adreno_a6xx.c +2 −1 Original line number Diff line number Diff line Loading @@ -172,7 +172,8 @@ static const struct { const struct kgsl_hwcg_reg *regs; unsigned int count; } a6xx_hwcg_registers[] = { {adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)} {adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)}, {adreno_is_a615, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)}, }; static struct a6xx_protected_regs { Loading Loading
drivers/gpu/msm/adreno-gpulist.h +17 −0 Original line number Diff line number Diff line Loading @@ -340,4 +340,21 @@ static const struct adreno_gpu_core adreno_gpulist[] = { .gpmu_tsens = 0x000C000D, .max_power = 5448, }, { .gpurev = ADRENO_REV_A615, .core = 6, .major = 1, .minor = 5, .patchid = ANY_ID, .features = ADRENO_64BIT | ADRENO_RPMH, .sqefw_name = "a630_sqe.fw", .zap_name = "a615_zap", .gpudev = &adreno_a6xx_gpudev, .gmem_size = SZ_512K, .num_protected_regs = 0x20, .busy_mask = 0xFFFFFFFE, .gpmufw_name = "a630_gmu.bin", .gpmu_major = 0x0, .gpmu_minor = 0x005, }, };
drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -195,6 +195,7 @@ enum adreno_gpurev { ADRENO_REV_A512 = 512, ADRENO_REV_A530 = 530, ADRENO_REV_A540 = 540, ADRENO_REV_A615 = 615, ADRENO_REV_A630 = 630, }; Loading Loading @@ -1144,6 +1145,7 @@ static inline int adreno_is_a6xx(struct adreno_device *adreno_dev) ADRENO_GPUREV(adreno_dev) < 700; } ADRENO_TARGET(a615, ADRENO_REV_A615) ADRENO_TARGET(a630, ADRENO_REV_A630) static inline int adreno_is_a630v1(struct adreno_device *adreno_dev) Loading
drivers/gpu/msm/adreno_a6xx.c +2 −1 Original line number Diff line number Diff line Loading @@ -172,7 +172,8 @@ static const struct { const struct kgsl_hwcg_reg *regs; unsigned int count; } a6xx_hwcg_registers[] = { {adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)} {adreno_is_a630, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)}, {adreno_is_a615, a630_hwcg_regs, ARRAY_SIZE(a630_hwcg_regs)}, }; static struct a6xx_protected_regs { Loading