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Commit 4c3032d8 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz
Browse files

ide: add struct ide_io_ports (take 3) 



* Add struct ide_io_ports and use it instead of `unsigned long io_ports[]`
  in ide_hwif_t.

* Rename io_ports[] in hw_regs_t to io_ports_array[].

* Use un-named union for 'unsigned long io_ports_array[]' and 'struct
  ide_io_ports io_ports' in hw_regs_t.

* Remove IDE_*_OFFSET defines.

v2:
* scc_pata.c build fix from Stephen Rothwell.

v3:
* Fix ctl_adrr typo in Sparc-specific part of ns87415.c.
  (Noticed by Andrew Morton)

Signed-off-by: default avatarBartlomiej Zolnierkiewicz <bzolnier@gmail.com>
parent 387750c3

drivers/ide/arm/bast-ide.c

+3 −3
Original line number Diff line number Diff line
@@ -35,12 +35,12 @@ static int __init bastide_register(unsigned int base, unsigned int aux, int irq) 
	base += BAST_IDE_CS;

	aux  += BAST_IDE_CS;



	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {

		hw.io_ports[i] = (unsigned long)base;

	for (i = 0; i <= 7; i++) {

		hw.io_ports_array[i] = (unsigned long)base;

		base += 0x20;

	}



	hw.io_ports[IDE_CONTROL_OFFSET] = aux + (6 * 0x20);

	hw.io_ports.ctl_addr = aux + (6 * 0x20);

	hw.irq = irq;



	hwif = ide_find_port();

drivers/ide/arm/icside.c

+4 −3
Original line number Diff line number Diff line
@@ -426,11 +426,12 @@ icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *e 
		 */

		default_hwif_mmiops(hwif);



		for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {

			hwif->io_ports[i] = port;

		for (i = 0; i <= 7; i++) {

			hwif->io_ports_array[i] = port;

			port += 1 << info->stepping;

		}

		hwif->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)base + info->ctrloffset;

		hwif->io_ports.ctl_addr =

			(unsigned long)base + info->ctrloffset;

		hwif->irq     = ec->irq;

		hwif->chipset = ide_acorn;

		hwif->gendev.parent = &ec->dev;

drivers/ide/arm/palm_bk3710.c

+3 −3
Original line number Diff line number Diff line
@@ -321,7 +321,7 @@ static int __devinit palm_bk3710_init_dma(ide_hwif_t *hwif, 
					  const struct ide_port_info *d)

{

	unsigned long base =

		hwif->io_ports[IDE_DATA_OFFSET] - IDE_PALM_ATA_PRI_REG_OFFSET;

		hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET;



	printk(KERN_INFO "    %s: MMIO-DMA\n", hwif->name);
@@ -386,8 +386,8 @@ static int __devinit palm_bk3710_probe(struct platform_device *pdev) 


	pribase = mem->start + IDE_PALM_ATA_PRI_REG_OFFSET;

	for (i = 0; i < IDE_NR_PORTS - 2; i++)

		hw.io_ports[i] = pribase + i;

	hw.io_ports[IDE_CONTROL_OFFSET] = mem->start +

		hw.io_ports_array[i] = pribase + i;

	hw.io_ports.ctl_addr = mem->start +

			IDE_PALM_ATA_PRI_CTL_OFFSET;

	hw.irq = irq->start;

	hw.chipset = ide_palm3710;

drivers/ide/arm/rapide.c

+3 −3
Original line number Diff line number Diff line
@@ -17,11 +17,11 @@ static void rapide_setup_ports(hw_regs_t *hw, void __iomem *base, 
	unsigned long port = (unsigned long)base;

	int i;



	for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {

		hw->io_ports[i] = port;

	for (i = 0; i <= 7; i++) {

		hw->io_ports_array[i] = port;

		port += sz;

	}

	hw->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl;

	hw->io_ports.ctl_addr = (unsigned long)ctrl;

	hw->irq = irq;

}

drivers/ide/cris/ide-cris.c

+9 −9
Original line number Diff line number Diff line
@@ -88,8 +88,8 @@ enum /* Transfer types */ 
int

cris_ide_ack_intr(ide_hwif_t* hwif)

{

	reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2,

	                         int, hwif->io_ports[0]);

	reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2, int,

					       hwif->io_ports.data_addr);

	REG_WR_INT(ata, regi_ata, rw_ack_intr, 1 << ctrl2.sel);

	return 1;

}
@@ -231,7 +231,7 @@ cris_ide_start_dma(ide_drive_t *drive, cris_dma_descr_type *d, int dir,int type, 
	ide_hwif_t *hwif = drive->hwif;



	reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2, int,

					       hwif->io_ports[IDE_DATA_OFFSET]);

					       hwif->io_ports.data_addr);

	reg_ata_rw_trf_cnt trf_cnt = {0};



	mycontext.saved_data = (dma_descr_data*)virt_to_phys(d);
@@ -271,7 +271,7 @@ static int cris_dma_test_irq(ide_drive_t *drive) 
	int intr = REG_RD_INT(ata, regi_ata, r_intr);



	reg_ata_rw_ctrl2 ctrl2 = REG_TYPE_CONV(reg_ata_rw_ctrl2, int,

					       hwif->io_ports[IDE_DATA_OFFSET]);

					       hwif->io_ports.data_addr);



	return intr & (1 << ctrl2.sel) ? 1 : 0;

}
@@ -531,7 +531,7 @@ static void cris_ide_start_dma(ide_drive_t *drive, cris_dma_descr_type *d, int d 
	*R_ATA_CTRL_DATA =

		cmd |

		IO_FIELD(R_ATA_CTRL_DATA, data,

			 drive->hwif->io_ports[IDE_DATA_OFFSET]) |

			 drive->hwif->io_ports.data_addr) |

		IO_STATE(R_ATA_CTRL_DATA, src_dst,  dma)  |

		IO_STATE(R_ATA_CTRL_DATA, multi,    on)   |

		IO_STATE(R_ATA_CTRL_DATA, dma_size, word);
@@ -550,7 +550,7 @@ static int cris_dma_test_irq(ide_drive_t *drive) 
{

	int intr = *R_IRQ_MASK0_RD;

	int bus = IO_EXTRACT(R_ATA_CTRL_DATA, sel,

			     drive->hwif->io_ports[IDE_DATA_OFFSET]);

			     drive->hwif->io_ports.data_addr);



	return intr & (1 << (bus + IO_BITNR(R_IRQ_MASK0_RD, ata_irq0))) ? 1 : 0;

}
@@ -644,7 +644,7 @@ cris_ide_inw(unsigned long reg) { 
		 * call will also timeout on busy, but as long as the

		 * write is still performed, everything will be fine.

		 */

		if (cris_ide_get_reg(reg) == IDE_STATUS_OFFSET)

		if (cris_ide_get_reg(reg) == 7)

			return BUSY_STAT;

		else

			/* For other rare cases we assume 0 is good enough.  */
@@ -765,13 +765,13 @@ static void __init cris_setup_ports(hw_regs_t *hw, unsigned long base) 
	memset(hw, 0, sizeof(*hw));



	for (i = 0; i <= 7; i++)

		hw->io_ports[i] = base + cris_ide_reg_addr(i, 0, 1);

		hw->io_ports_array[i] = base + cris_ide_reg_addr(i, 0, 1);



	/*

	 * the IDE control register is at ATA address 6,

	 * with CS1 active instead of CS0

	 */

	hw->io_ports[IDE_CONTROL_OFFSET] = base + cris_ide_reg_addr(6, 1, 0);

	hw->io_ports.ctl_addr = base + cris_ide_reg_addr(6, 1, 0);



	hw->irq = ide_default_irq(0);

	hw->ack_intr = cris_ide_ack_intr;