Loading arch/arm64/boot/dts/qcom/msmskunk.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -497,6 +497,13 @@ #reset-cells = <1>; }; clock_cpucc: qcom,cpucc { compatible = "qcom,dummycc"; clock-output-names = "cpucc_clocks"; #clock-cells = <1>; #reset-cells = <1>; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xda8>; /* PHY regs */ reg-names = "phy_mem"; Loading Loading
arch/arm64/boot/dts/qcom/msmskunk.dtsi +7 −0 Original line number Diff line number Diff line Loading @@ -497,6 +497,13 @@ #reset-cells = <1>; }; clock_cpucc: qcom,cpucc { compatible = "qcom,dummycc"; clock-output-names = "cpucc_clocks"; #clock-cells = <1>; #reset-cells = <1>; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xda8>; /* PHY regs */ reg-names = "phy_mem"; Loading