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Commit 4b7d97ac authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: drop wait_for_mc_idle asic callback 



Only used in the gmc IP modules so just call the local
function directly.

Reviewed-by: default avatarChunming Zhou <david1.zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ccd73f24

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+0 −3
Original line number Diff line number Diff line
@@ -1827,8 +1827,6 @@ struct amdgpu_asic_funcs { 
			     u32 sh_num, u32 reg_offset, u32 *value);

	void (*set_vga_state)(struct amdgpu_device *adev, bool state);

	int (*reset)(struct amdgpu_device *adev);

	/* wait for mc_idle */

	int (*wait_for_mc_idle)(struct amdgpu_device *adev);

	/* get the reference clock */

	u32 (*get_xclk)(struct amdgpu_device *adev);

	/* get the gpu clock counter */
@@ -2223,7 +2221,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 
 */

#define amdgpu_asic_set_vga_state(adev, state) (adev)->asic_funcs->set_vga_state((adev), (state))

#define amdgpu_asic_reset(adev) (adev)->asic_funcs->reset((adev))

#define amdgpu_asic_wait_for_mc_idle(adev) (adev)->asic_funcs->wait_for_mc_idle((adev))

#define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev))

#define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))

#define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))

drivers/gpu/drm/amd/amdgpu/cik.c

+0 −1
Original line number Diff line number Diff line
@@ -2024,7 +2024,6 @@ static const struct amdgpu_asic_funcs cik_asic_funcs = 
	.get_virtual_caps = &cik_get_virtual_caps,

	/* these should be moved to their own ip modules */

	.get_gpu_clock_counter = &gfx_v7_0_get_gpu_clock_counter,

	.wait_for_mc_idle = &gmc_v7_0_mc_wait_for_idle,

};



static int cik_common_early_init(void *handle)

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

+4 −4
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static void gmc_v7_0_init_golden_registers(struct amdgpu_device *adev) 
 * (evergreen+).

 * Returns 0 if the MC is idle, -1 if not.

 */

int gmc_v7_0_mc_wait_for_idle(struct amdgpu_device *adev)

static int gmc_v7_0_mc_wait_for_idle(struct amdgpu_device *adev)

{

	unsigned i;

	u32 tmp;
@@ -105,7 +105,7 @@ static void gmc_v7_0_mc_stop(struct amdgpu_device *adev, 
	if (adev->mode_info.num_crtc)

		amdgpu_display_stop_mc_access(adev, save);



	amdgpu_asic_wait_for_mc_idle(adev);

	gmc_v7_0_mc_wait_for_idle(adev);



	blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);

	if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {
@@ -311,7 +311,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) 
		amdgpu_display_set_vga_render_state(adev, false);



	gmc_v7_0_mc_stop(adev, &save);

	if (amdgpu_asic_wait_for_mc_idle(adev)) {

	if (gmc_v7_0_mc_wait_for_idle(adev)) {

		dev_warn(adev->dev, "Wait for MC idle timedout !\n");

	}

	/* Update configuration */
@@ -331,7 +331,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev) 
	WREG32(mmMC_VM_AGP_BASE, 0);

	WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);

	WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);

	if (amdgpu_asic_wait_for_mc_idle(adev)) {

	if (gmc_v7_0_mc_wait_for_idle(adev)) {

		dev_warn(adev->dev, "Wait for MC idle timedout !\n");

	}

	gmc_v7_0_mc_resume(adev, &save);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.h

+0 −3
Original line number Diff line number Diff line
@@ -26,7 +26,4 @@ 


extern const struct amd_ip_funcs gmc_v7_0_ip_funcs;



/* XXX these shouldn't be exported */

int gmc_v7_0_mc_wait_for_idle(struct amdgpu_device *adev);



#endif

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

+4 −4
Original line number Diff line number Diff line
@@ -156,7 +156,7 @@ static void gmc_v8_0_init_golden_registers(struct amdgpu_device *adev) 
 * (evergreen+).

 * Returns 0 if the MC is idle, -1 if not.

 */

int gmc_v8_0_mc_wait_for_idle(struct amdgpu_device *adev)

static int gmc_v8_0_mc_wait_for_idle(struct amdgpu_device *adev)

{

	unsigned i;

	u32 tmp;
@@ -184,7 +184,7 @@ static void gmc_v8_0_mc_stop(struct amdgpu_device *adev, 
	if (adev->mode_info.num_crtc)

		amdgpu_display_stop_mc_access(adev, save);



	amdgpu_asic_wait_for_mc_idle(adev);

	gmc_v8_0_mc_wait_for_idle(adev);



	blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);

	if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) {
@@ -393,7 +393,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) 
		amdgpu_display_set_vga_render_state(adev, false);



	gmc_v8_0_mc_stop(adev, &save);

	if (amdgpu_asic_wait_for_mc_idle(adev)) {

	if (gmc_v8_0_mc_wait_for_idle(adev)) {

		dev_warn(adev->dev, "Wait for MC idle timedout !\n");

	}

	/* Update configuration */
@@ -413,7 +413,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) 
	WREG32(mmMC_VM_AGP_BASE, 0);

	WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);

	WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);

	if (amdgpu_asic_wait_for_mc_idle(adev)) {

	if (gmc_v8_0_mc_wait_for_idle(adev)) {

		dev_warn(adev->dev, "Wait for MC idle timedout !\n");

	}

	gmc_v8_0_mc_resume(adev, &save);