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Commit 4a0cce79 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes 

From Nicolas Ferre:
- One definition fix that can lead to mis-clock some AT91 peripherals on SAMA5.
- Two DT related fixes.

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91

:
  ARM: at91/sama5: fix incorrect PMC pcr div definition
  ARM: at91/dt: fix macb pinctrl_macb_rmii_mii_alt definition
  ARM: at91: at91sam9n12: move external irq declatation to DT

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 580b000d 144ea15e

arch/arm/boot/dts/at91sam9260.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -264,7 +264,7 @@ 
						atmel,pins =

							<0 10 0x2 0x0	/* PA10 periph B */

							 0 11 0x2 0x0	/* PA11 periph B */

							 0 24 0x2 0x0	/* PA24 periph B */

							 0 22 0x2 0x0	/* PA22 periph B */

							 0 25 0x2 0x0	/* PA25 periph B */

							 0 26 0x2 0x0	/* PA26 periph B */

							 0 27 0x2 0x0	/* PA27 periph B */

arch/arm/boot/dts/at91sam9n12.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@ 
				compatible = "atmel,at91rm9200-aic";

				interrupt-controller;

				reg = <0xfffff000 0x200>;

				atmel,external-irqs = <31>;

			};



			ramc0: ramc@ffffe800 {

arch/arm/mach-at91/at91sam9n12.c

+0 −6
Original line number Diff line number Diff line
@@ -223,13 +223,7 @@ static void __init at91sam9n12_map_io(void) 
	at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);

}



void __init at91sam9n12_initialize(void)

{

	at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);

}



AT91_SOC_START(at91sam9n12)

	.map_io = at91sam9n12_map_io,

	.register_clocks = at91sam9n12_register_clocks,

	.init = at91sam9n12_initialize,

AT91_SOC_END

arch/arm/mach-at91/include/mach/at91_pmc.h

+3 −3
Original line number Diff line number Diff line
@@ -179,9 +179,9 @@ extern void __iomem *at91_pmc_base; 
#define		AT91_PMC_PCR_CMD	(0x1  <<  12)		/* Command (read=0, write=1) */

#define		AT91_PMC_PCR_DIV(n)	((n)  <<  16)		/* Divisor Value */

#define			AT91_PMC_PCR_DIV0	0x0			/* Peripheral clock is MCK */

#define			AT91_PMC_PCR_DIV2	0x2			/* Peripheral clock is MCK/2 */

#define			AT91_PMC_PCR_DIV4	0x4			/* Peripheral clock is MCK/4 */

#define			AT91_PMC_PCR_DIV8	0x8			/* Peripheral clock is MCK/8 */

#define			AT91_PMC_PCR_DIV2	0x1			/* Peripheral clock is MCK/2 */

#define			AT91_PMC_PCR_DIV4	0x2			/* Peripheral clock is MCK/4 */

#define			AT91_PMC_PCR_DIV8	0x3			/* Peripheral clock is MCK/8 */

#define		AT91_PMC_PCR_EN		(0x1  <<  28)		/* Enable */



#endif