Loading arch/arm/configs/sa415m-perf_defconfig +5 −3 Original line number Diff line number Diff line Loading @@ -445,10 +445,12 @@ CONFIG_SECURITY_NETWORK=y CONFIG_HARDENED_USERCOPY=y CONFIG_SECURITY_SELINUX=y # CONFIG_SECURITY_SELINUX_AVC_STATS is not set CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=m CONFIG_CRYPTO_DEV_QCRYPTO=m CONFIG_CRYPTO_DEV_QCEDEV=m # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set # CONFIG_XZ_DEC_IA64 is not set Loading arch/arm/configs/sa415m_defconfig +5 −3 Original line number Diff line number Diff line Loading @@ -483,8 +483,10 @@ CONFIG_SECURITY_NETWORK=y CONFIG_HARDENED_USERCOPY=y CONFIG_SECURITY_SELINUX=y # CONFIG_SECURITY_SELINUX_AVC_STATS is not set CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=m CONFIG_CRYPTO_DEV_QCRYPTO=m CONFIG_CRYPTO_DEV_QCEDEV=m CONFIG_XZ_DEC=y CONFIG_QMI_ENCDEC=y drivers/crypto/msm/Makefile +2 −2 Original line number Diff line number Diff line obj-$(CONFIG_CRYPTO_DEV_QCOM_MSM_QCE) += qce50.o obj-$(CONFIG_CRYPTO_DEV_QCEDEV) += qcedev.o obj-$(CONFIG_CRYPTO_DEV_QCEDEV) += qcedev_smmu.o qcedevice-objs := qcedev_smmu.o qcedev.o obj-$(CONFIG_CRYPTO_DEV_QCEDEV) += qcedevice.o obj-$(CONFIG_CRYPTO_DEV_QCRYPTO) += qcrypto.o obj-$(CONFIG_CRYPTO_DEV_OTA_CRYPTO) += ota_crypto.o obj-$(CONFIG_CRYPTO_DEV_QCOM_ICE) += ice.o drivers/crypto/msm/qcedev.c +2 −2 Original line number Diff line number Diff line Loading @@ -60,14 +60,14 @@ static DEFINE_MUTEX(send_cmd_lock); static DEFINE_MUTEX(qcedev_sent_bw_req); static DEFINE_MUTEX(hash_access_lock); MODULE_DEVICE_TABLE(of, qcedev_match); static const struct of_device_id qcedev_match[] = { { .compatible = "qcom,qcedev"}, { .compatible = "qcom,qcedev,context-bank"}, {} }; MODULE_DEVICE_TABLE(of, qcedev_match); static int qcedev_control_clocks(struct qcedev_control *podev, bool enable) { unsigned int control_flag; Loading Loading
arch/arm/configs/sa415m-perf_defconfig +5 −3 Original line number Diff line number Diff line Loading @@ -445,10 +445,12 @@ CONFIG_SECURITY_NETWORK=y CONFIG_HARDENED_USERCOPY=y CONFIG_SECURITY_SELINUX=y # CONFIG_SECURITY_SELINUX_AVC_STATS is not set CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=m CONFIG_CRYPTO_DEV_QCRYPTO=m CONFIG_CRYPTO_DEV_QCEDEV=m # CONFIG_XZ_DEC_X86 is not set # CONFIG_XZ_DEC_POWERPC is not set # CONFIG_XZ_DEC_IA64 is not set Loading
arch/arm/configs/sa415m_defconfig +5 −3 Original line number Diff line number Diff line Loading @@ -483,8 +483,10 @@ CONFIG_SECURITY_NETWORK=y CONFIG_HARDENED_USERCOPY=y CONFIG_SECURITY_SELINUX=y # CONFIG_SECURITY_SELINUX_AVC_STATS is not set CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=y CONFIG_CRYPTO_DEV_QCRYPTO=y CONFIG_CRYPTO_DEV_QCEDEV=y CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_QCOM_MSM_QCE=m CONFIG_CRYPTO_DEV_QCRYPTO=m CONFIG_CRYPTO_DEV_QCEDEV=m CONFIG_XZ_DEC=y CONFIG_QMI_ENCDEC=y
drivers/crypto/msm/Makefile +2 −2 Original line number Diff line number Diff line obj-$(CONFIG_CRYPTO_DEV_QCOM_MSM_QCE) += qce50.o obj-$(CONFIG_CRYPTO_DEV_QCEDEV) += qcedev.o obj-$(CONFIG_CRYPTO_DEV_QCEDEV) += qcedev_smmu.o qcedevice-objs := qcedev_smmu.o qcedev.o obj-$(CONFIG_CRYPTO_DEV_QCEDEV) += qcedevice.o obj-$(CONFIG_CRYPTO_DEV_QCRYPTO) += qcrypto.o obj-$(CONFIG_CRYPTO_DEV_OTA_CRYPTO) += ota_crypto.o obj-$(CONFIG_CRYPTO_DEV_QCOM_ICE) += ice.o
drivers/crypto/msm/qcedev.c +2 −2 Original line number Diff line number Diff line Loading @@ -60,14 +60,14 @@ static DEFINE_MUTEX(send_cmd_lock); static DEFINE_MUTEX(qcedev_sent_bw_req); static DEFINE_MUTEX(hash_access_lock); MODULE_DEVICE_TABLE(of, qcedev_match); static const struct of_device_id qcedev_match[] = { { .compatible = "qcom,qcedev"}, { .compatible = "qcom,qcedev,context-bank"}, {} }; MODULE_DEVICE_TABLE(of, qcedev_match); static int qcedev_control_clocks(struct qcedev_control *podev, bool enable) { unsigned int control_flag; Loading