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Commit 49af46b4 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
Browse files

arm64: renesas: r8a7795: Add all SCIF nodes 



Add the device nodes for all R-Car H3 SCIF serial ports, incl. clocks,
clock domain, and dma properties.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarGaku Inami <gaku.inami.xw@bp.renesas.com>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarMagnus Damm <damm+renesas@opensource.se>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent d9202126

arch/arm64/boot/dts/renesas/r8a7795.dtsi

+73 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
 * kind, whether express or implied.

 */



#include <dt-bindings/clock/r8a7795-cpg-mssr.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>



/ {
@@ -91,5 +92,77 @@ 
		dmac2: dma-controller@e7310000 {

			/* Empty node for now */

		};



		scif0: serial@e6e60000 {

			compatible = "renesas,scif-r8a7795", "renesas,scif";

			reg = <0 0xe6e60000 0 64>;

			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 207>;

			clock-names = "sci_ick";

			dmas = <&dmac1 0x51>, <&dmac1 0x50>;

			dma-names = "tx", "rx";

			power-domains = <&cpg>;

			status = "disabled";

		};



		scif1: serial@e6e68000 {

			compatible = "renesas,scif-r8a7795", "renesas,scif";

			reg = <0 0xe6e68000 0 64>;

			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 206>;

			clock-names = "sci_ick";

			dmas = <&dmac1 0x53>, <&dmac1 0x52>;

			dma-names = "tx", "rx";

			power-domains = <&cpg>;

			status = "disabled";

		};



		scif2: serial@e6e88000 {

			compatible = "renesas,scif-r8a7795", "renesas,scif";

			reg = <0 0xe6e88000 0 64>;

			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 310>;

			clock-names = "sci_ick";

			dmas = <&dmac1 0x13>, <&dmac1 0x12>;

			dma-names = "tx", "rx";

			power-domains = <&cpg>;

			status = "disabled";

		};



		scif3: serial@e6c50000 {

			compatible = "renesas,scif-r8a7795", "renesas,scif";

			reg = <0 0xe6c50000 0 64>;

			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 204>;

			clock-names = "sci_ick";

			dmas = <&dmac0 0x57>, <&dmac0 0x56>;

			dma-names = "tx", "rx";

			power-domains = <&cpg>;

			status = "disabled";

		};



		scif4: serial@e6c40000 {

			compatible = "renesas,scif-r8a7795", "renesas,scif";

			reg = <0 0xe6c40000 0 64>;

			interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 203>;

			clock-names = "sci_ick";

			dmas = <&dmac0 0x59>, <&dmac0 0x58>;

			dma-names = "tx", "rx";

			power-domains = <&cpg>;

			status = "disabled";

		};



		scif5: serial@e6f30000 {

			compatible = "renesas,scif-r8a7795", "renesas,scif";

			reg = <0 0xe6f30000 0 64>;

			interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 202>;

			clock-names = "sci_ick";

			dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;

			dma-names = "tx", "rx";

			power-domains = <&cpg>;

			status = "disabled";

		};

	};

};