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Commit 49ae9119 authored by Shashank Babu Chinta Venkata's avatar Shashank Babu Chinta Venkata
Browse files

msm: clk: qcom: Remove unsupported PLL drivers



Remove support for older targets which are not supported on
common clock framework

Change-Id: I482f6c77f35e0e70801da8b85d04d67b3c767c34
Signed-off-by: default avatarShashank Babu Chinta Venkata <sbchin@codeaurora.org>
parent 417dbabb
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+0 −6
Original line number Diff line number Diff line
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-pll-util.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-pll.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8996.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8996-util.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-8998.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dp-pll-8998.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dp-pll-8998-util.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-8996.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-8998.o
+2 −52
Original line number Diff line number Diff line
@@ -128,32 +128,10 @@ static int mdss_pll_resource_parse(struct platform_device *pdev,
		goto err;
	}

	if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8996")) {
		pll_res->pll_interface_type = MDSS_DSI_PLL_8996;
		pll_res->target_id = MDSS_PLL_TARGET_8996;
		pll_res->revision = 1;
	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8996_v2")) {
		pll_res->pll_interface_type = MDSS_DSI_PLL_8996;
		pll_res->target_id = MDSS_PLL_TARGET_8996;
		pll_res->revision = 2;
	} else if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8998")) {
	if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_8998"))
		pll_res->pll_interface_type = MDSS_DSI_PLL_8998;
	} else if (!strcmp(compatible_stream, "qcom,mdss_dp_pll_8998")) {
		pll_res->pll_interface_type = MDSS_DP_PLL_8998;
	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8996")) {
		pll_res->pll_interface_type = MDSS_HDMI_PLL_8996;
	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8996_v2")) {
		pll_res->pll_interface_type = MDSS_HDMI_PLL_8996_V2;
	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8996_v3")) {
		pll_res->pll_interface_type = MDSS_HDMI_PLL_8996_V3;
	} else if (!strcmp(compatible_stream,
				"qcom,mdss_hdmi_pll_8996_v3_1p8")) {
		pll_res->pll_interface_type = MDSS_HDMI_PLL_8996_V3_1_8;
	} else if (!strcmp(compatible_stream, "qcom,mdss_hdmi_pll_8998")) {
		pll_res->pll_interface_type = MDSS_HDMI_PLL_8998;
	} else {
	else
		goto err;
	}

	return rc;

@@ -174,28 +152,8 @@ static int mdss_pll_clock_register(struct platform_device *pdev,
	}

	switch (pll_res->pll_interface_type) {
	case MDSS_DSI_PLL_8996:
		rc = dsi_pll_clock_register_8996(pdev, pll_res);
		break;
	case MDSS_DSI_PLL_8998:
		rc = dsi_pll_clock_register_8998(pdev, pll_res);
	case MDSS_DP_PLL_8998:
		rc = dp_pll_clock_register_8998(pdev, pll_res);
		break;
	case MDSS_HDMI_PLL_8996:
		rc = hdmi_8996_v1_pll_clock_register(pdev, pll_res);
		break;
	case MDSS_HDMI_PLL_8996_V2:
		rc = hdmi_8996_v2_pll_clock_register(pdev, pll_res);
		break;
	case MDSS_HDMI_PLL_8996_V3:
		rc = hdmi_8996_v3_pll_clock_register(pdev, pll_res);
		break;
	case MDSS_HDMI_PLL_8996_V3_1_8:
		rc = hdmi_8996_v3_1p8_pll_clock_register(pdev, pll_res);
		break;
	case MDSS_HDMI_PLL_8998:
		rc = hdmi_8998_pll_clock_register(pdev, pll_res);
		break;
	case MDSS_UNKNOWN_PLL:
	default:
@@ -392,15 +350,7 @@ static int mdss_pll_remove(struct platform_device *pdev)
}

static const struct of_device_id mdss_pll_dt_match[] = {
	{.compatible = "qcom,mdss_dsi_pll_8996"},
	{.compatible = "qcom,mdss_dsi_pll_8996_v2"},
	{.compatible = "qcom,mdss_dsi_pll_8998"},
	{.compatible = "qcom,mdss_hdmi_pll_8996"},
	{.compatible = "qcom,mdss_hdmi_pll_8996_v2"},
	{.compatible = "qcom,mdss_hdmi_pll_8996_v3"},
	{.compatible = "qcom,mdss_hdmi_pll_8996_v3_1p8"},
	{.compatible = "qcom,mdss_dp_pll_8998"},
	{.compatible = "qcom,mdss_hdmi_pll_8998"},
	{}
};

+0 −7
Original line number Diff line number Diff line
@@ -30,14 +30,7 @@
			(base) + (offset))

enum {
	MDSS_DSI_PLL_8996,
	MDSS_DSI_PLL_8998,
	MDSS_DP_PLL_8998,
	MDSS_HDMI_PLL_8996,
	MDSS_HDMI_PLL_8996_V2,
	MDSS_HDMI_PLL_8996_V3,
	MDSS_HDMI_PLL_8996_V3_1_8,
	MDSS_HDMI_PLL_8998,
	MDSS_UNKNOWN_PLL,
};