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Commit 489bc476 authored by Alex Deucher's avatar Alex Deucher
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drm/radeon/dpm: fix display gap programming on SI



Need to set the DISP*_GAP fields as well as the
DISP*_GAP_MCHG fields.  Same as on previous asics.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7d61d835
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+5 −1
Original line number Diff line number Diff line
@@ -3620,8 +3620,12 @@ static void si_enable_display_gap(struct radeon_device *rdev)
{
	u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL);

	tmp &= ~(DISP1_GAP_MASK | DISP2_GAP_MASK);
	tmp |= (DISP1_GAP(R600_PM_DISPLAY_GAP_IGNORE) |
		DISP2_GAP(R600_PM_DISPLAY_GAP_IGNORE));

	tmp &= ~(DISP1_GAP_MCHG_MASK | DISP2_GAP_MCHG_MASK);
	tmp |= (DISP1_GAP_MCHG(R600_PM_DISPLAY_GAP_IGNORE) |
	tmp |= (DISP1_GAP_MCHG(R600_PM_DISPLAY_GAP_VBLANK) |
		DISP2_GAP_MCHG(R600_PM_DISPLAY_GAP_IGNORE));
	WREG32(CG_DISPLAY_GAP_CNTL, tmp);
}