Loading drivers/usb/dwc3/core.c +10 −0 Original line number Diff line number Diff line Loading @@ -903,6 +903,16 @@ int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); } /* * Enable hardware control of sending remote wakeup in HS when * the device is in the L1 state. */ if (dwc->revision >= DWC3_REVISION_290A) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); } return 0; err2: Loading drivers/usb/dwc3/core.h +4 −0 Original line number Diff line number Diff line Loading @@ -217,6 +217,9 @@ /* Global Debug LTSSM Register */ #define DWC3_GDBGLTSSM_LINKSTATE_MASK (0xF << 22) /* Global User Control 1 Register */ #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW (1 << 24) /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) #define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) Loading Loading @@ -1036,6 +1039,7 @@ struct dwc3 { #define DWC3_REVISION_260A 0x5533260a #define DWC3_REVISION_270A 0x5533270a #define DWC3_REVISION_280A 0x5533280a #define DWC3_REVISION_290A 0x5533290a #define DWC3_REVISION_300A 0x5533300a #define DWC3_REVISION_310A 0x5533310a #define DWC3_REVISION_320A 0x5533320a Loading Loading
drivers/usb/dwc3/core.c +10 −0 Original line number Diff line number Diff line Loading @@ -903,6 +903,16 @@ int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); } /* * Enable hardware control of sending remote wakeup in HS when * the device is in the L1 state. */ if (dwc->revision >= DWC3_REVISION_290A) { reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); } return 0; err2: Loading
drivers/usb/dwc3/core.h +4 −0 Original line number Diff line number Diff line Loading @@ -217,6 +217,9 @@ /* Global Debug LTSSM Register */ #define DWC3_GDBGLTSSM_LINKSTATE_MASK (0xF << 22) /* Global User Control 1 Register */ #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW (1 << 24) /* Global USB2 PHY Configuration Register */ #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31) #define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8) Loading Loading @@ -1036,6 +1039,7 @@ struct dwc3 { #define DWC3_REVISION_260A 0x5533260a #define DWC3_REVISION_270A 0x5533270a #define DWC3_REVISION_280A 0x5533280a #define DWC3_REVISION_290A 0x5533290a #define DWC3_REVISION_300A 0x5533300a #define DWC3_REVISION_310A 0x5533310a #define DWC3_REVISION_320A 0x5533320a Loading