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Commit 47e084f5 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

clk: qcom: Update the frequency tables for certain GCC and CAMCC clocks 



Update the frequency tables for some peripheral and camera
controller clocks in order to align them with the current
SDM845 frequency plans.

Change-Id: I36cc927537871916febf822e7e67e9fbbc5feea5
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 5915565f

drivers/clk/qcom/camcc-sdm845.c

+18 −4
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ static const char * const cam_cc_parent_names_1[] = { 
};



static struct pll_vco fabia_vco[] = {

	{ 250000000, 2000000000, 0 },

	{ 249600000, 2000000000, 0 },

	{ 125000000, 1000000000, 1 },

};
@@ -278,6 +278,7 @@ static struct clk_alpha_pll_postdiv cam_cc_pll3_out_even = { 
};



static const struct freq_tbl ftbl_cam_cc_bps_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0),

	F(200000000, P_CAM_CC_PLL0_OUT_EVEN, 3, 0, 0),

	F(404000000, P_CAM_CC_PLL1_OUT_EVEN, 2, 0, 0),
@@ -316,7 +317,6 @@ static const struct freq_tbl ftbl_cam_cc_cci_clk_src[] = { 
	{ }

};





static struct clk_rcg2 cam_cc_cci_clk_src = {

	.cmd_rcgr = 0xb0d8,

	.mnd_width = 8,
@@ -341,7 +341,7 @@ static const struct freq_tbl ftbl_cam_cc_cphy_rx_clk_src[] = { 
	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(300000000, P_CAM_CC_PLL0_OUT_EVEN, 2, 0, 0),

	F(320000000, P_CAM_CC_PLL2_OUT_ODD, 3, 0, 0),

	F(384000000, P_CAM_CC_PLL2_OUT_ODD, 2.5, 0, 0),

	F(384000000, P_CAM_CC_PLL3_OUT_EVEN, 1, 0, 0),

	{ }

};
@@ -430,6 +430,7 @@ static struct clk_rcg2 cam_cc_csi2phytimer_clk_src = { 
};



static const struct freq_tbl ftbl_cam_cc_fast_ahb_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(50000000, P_CAM_CC_PLL0_OUT_EVEN, 12, 0, 0),

	F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0),

	F(200000000, P_CAM_CC_PLL0_OUT_EVEN, 3, 0, 0),
@@ -490,13 +491,22 @@ static struct clk_rcg2 cam_cc_fd_core_clk_src = { 
	},

};



static const struct freq_tbl ftbl_cam_cc_icp_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(320000000, P_CAM_CC_PLL2_OUT_EVEN, 1.5, 0, 0),

	F(400000000, P_CAM_CC_PLL0_OUT_EVEN, 1.5, 0, 0),

	F(538666667, P_CAM_CC_PLL1_OUT_EVEN, 1.5, 0, 0),

	F(600000000, P_CAM_CC_PLL0_OUT_EVEN, 1, 0, 0),

	{ }

};



static struct clk_rcg2 cam_cc_icp_clk_src = {

	.cmd_rcgr = 0xb088,

	.mnd_width = 0,

	.hid_width = 5,

	.enable_safe_config = true,

	.parent_map = cam_cc_parent_map_0,

	.freq_tbl = ftbl_cam_cc_fd_core_clk_src,

	.freq_tbl = ftbl_cam_cc_icp_clk_src,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "cam_cc_icp_clk_src",

		.parent_names = cam_cc_parent_names_0,
@@ -513,6 +523,7 @@ static struct clk_rcg2 cam_cc_icp_clk_src = { 
};



static const struct freq_tbl ftbl_cam_cc_ife_0_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0),

	F(320000000, P_CAM_CC_PLL2_OUT_EVEN, 1.5, 0, 0),

	F(404000000, P_CAM_CC_PLL1_OUT_EVEN, 2, 0, 0),
@@ -544,6 +555,7 @@ static struct clk_rcg2 cam_cc_ife_0_clk_src = { 
};



static const struct freq_tbl ftbl_cam_cc_ife_0_csid_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(75000000, P_CAM_CC_PLL0_OUT_EVEN, 8, 0, 0),

	F(384000000, P_CAM_CC_PLL3_OUT_EVEN, 1, 0, 0),

	F(538666667, P_CAM_CC_PLL1_OUT_EVEN, 1.5, 0, 0),
@@ -655,6 +667,7 @@ static struct clk_rcg2 cam_cc_ife_lite_csid_clk_src = { 
};



static const struct freq_tbl ftbl_cam_cc_ipe_0_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0),

	F(240000000, P_CAM_CC_PLL0_OUT_EVEN, 2.5, 0, 0),

	F(404000000, P_CAM_CC_PLL1_OUT_EVEN, 2, 0, 0),
@@ -733,6 +746,7 @@ static struct clk_rcg2 cam_cc_jpeg_clk_src = { 
};



static const struct freq_tbl ftbl_cam_cc_lrme_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(100000000, P_CAM_CC_PLL0_OUT_EVEN, 6, 0, 0),

	F(200000000, P_CAM_CC_PLL0_OUT_EVEN, 3, 0, 0),

	F(384000000, P_CAM_CC_PLL2_OUT_ODD, 2.5, 0, 0),

drivers/clk/qcom/gcc-sdm845.c

+3 −3
Original line number Diff line number Diff line
@@ -197,7 +197,7 @@ static struct clk_dummy measure_only_ipa_2x_clk = { 
};



static struct pll_vco fabia_vco[] = {

	{ 250000000, 2000000000, 0 },

	{ 249600000, 2000000000, 0 },

	{ 125000000, 1000000000, 1 },

};
@@ -790,8 +790,8 @@ static const struct freq_tbl ftbl_gcc_sdcc2_apps_clk_src[] = { 
	F(400000, P_BI_TCXO, 12, 1, 4),

	F(9600000, P_BI_TCXO, 2, 0, 0),

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(25000000, P_GPLL0_OUT_MAIN, 12, 1, 2),

	F(50000000, P_GPLL0_OUT_MAIN, 12, 0, 0),

	F(25000000, P_GPLL0_OUT_EVEN, 12, 0, 0),

	F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0),

	F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),

	F(200000000, P_GPLL0_OUT_MAIN, 3, 0, 0),

	{ }