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Commit 47acde16 authored by Afzal Mohammed's avatar Afzal Mohammed
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ARM: OMAP2+: tusb6010: generic timing calculation 



Generic gpmc timing calculation helper is available now, use
it instead of custom timing calculation.

Signed-off-by: default avatarAfzal Mohammed <afzal@ti.com>
parent ac2d9ae1

arch/arm/mach-omap2/usb-tusb6010.c

+44 −138
Original line number Diff line number Diff line
@@ -27,182 +27,88 @@ static u8 async_cs, sync_cs; 
static unsigned		refclk_psec;





/* t2_ps, when quantized to fclk units, must happen no earlier than

 * the clock after after t1_NS.

 *

 * Return a possibly updated value of t2_ps, converted to nsec.

 */

static unsigned

next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps)

{

	unsigned	t1_ps = t1_NS * 1000;

	unsigned	t1_f, t2_f;



	if ((t1_ps + fclk_ps) < t2_ps)

		return t2_ps / 1000;



	t1_f = (t1_ps + fclk_ps - 1) / fclk_ps;

	t2_f = (t2_ps + fclk_ps - 1) / fclk_ps;



	if (t1_f >= t2_f)

		t2_f = t1_f + 1;



	return (t2_f * fclk_ps) / 1000;

}



/* NOTE:  timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */



static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps)

static int tusb_set_async_mode(unsigned sysclk_ps)

{

	struct gpmc_device_timings dev_t;

	struct gpmc_timings	t;

	unsigned		t_acsnh_advnh = sysclk_ps + 3000;

	unsigned		tmp;



	memset(&t, 0, sizeof(t));



	/* CS_ON = t_acsnh_acsnl */

	t.cs_on = 8;

	/* ADV_ON = t_acsnh_advnh - t_advn */

	t.adv_on = next_clk(t.cs_on, t_acsnh_advnh - 7000, fclk_ps);



	/*

	 * READ ... from omap2420 TRM fig 12-13

	 */



	/* ADV_RD_OFF = t_acsnh_advnh */

	t.adv_rd_off = next_clk(t.adv_on, t_acsnh_advnh, fclk_ps);



	/* OE_ON = t_acsnh_advnh + t_advn_oen (then wait for nRDY) */

	t.oe_on = next_clk(t.adv_on, t_acsnh_advnh + 1000, fclk_ps);



	/* ACCESS = counters continue only after nRDY */

	tmp = t.oe_on * 1000 + 300;

	t.access = next_clk(t.oe_on, tmp, fclk_ps);



	/* OE_OFF = after data gets sampled */

	tmp = t.access * 1000;

	t.oe_off = next_clk(t.access, tmp, fclk_ps);



	t.cs_rd_off = t.oe_off;



	tmp = t.cs_rd_off * 1000 + 7000 /* t_acsn_rdy_z */;

	t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);



	/*

	 * WRITE ... from omap2420 TRM fig 12-15

	 */



	/* ADV_WR_OFF = t_acsnh_advnh */

	t.adv_wr_off = t.adv_rd_off;

	memset(&dev_t, 0, sizeof(dev_t));



	/* WE_ON = t_acsnh_advnh + t_advn_wen (then wait for nRDY) */

	t.we_on = next_clk(t.adv_wr_off, t_acsnh_advnh + 1000, fclk_ps);

	dev_t.mux = true;



	/* WE_OFF = after data gets sampled */

	tmp = t.we_on * 1000 + 300;

	t.we_off = next_clk(t.we_on, tmp, fclk_ps);

	dev_t.t_ceasu = 8 * 1000;

	dev_t.t_avdasu = t_acsnh_advnh - 7000;

	dev_t.t_ce_avd = 1000;

	dev_t.t_avdp_r = t_acsnh_advnh;

	dev_t.t_oeasu = t_acsnh_advnh + 1000;

	dev_t.t_oe = 300;

	dev_t.t_cez_r = 7000;

	dev_t.t_cez_w = dev_t.t_cez_r;

	dev_t.t_avdp_w = t_acsnh_advnh;

	dev_t.t_weasu = t_acsnh_advnh + 1000;

	dev_t.t_wpl = 300;

	dev_t.cyc_aavdh_we = 1;



	t.cs_wr_off = t.we_off;



	tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */;

	t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);

	gpmc_calc_timings(&t, &dev_t);



	return gpmc_cs_set_timings(async_cs, &t);

}



static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps)

static int tusb_set_sync_mode(unsigned sysclk_ps)

{

	struct gpmc_device_timings dev_t;

	struct gpmc_timings	t;

	unsigned		t_scsnh_advnh = sysclk_ps + 3000;

	unsigned		tmp;



	memset(&t, 0, sizeof(t));

	t.cs_on = 8;



	/* ADV_ON = t_acsnh_advnh - t_advn */

	t.adv_on = next_clk(t.cs_on, t_scsnh_advnh - 7000, fclk_ps);



	/* GPMC_CLK rate = fclk rate / div */

	t.sync_clk = 11100 /* 11.1 nsec */;

	tmp = (t.sync_clk + fclk_ps - 1) / fclk_ps;

	if (tmp > 4)

		return -ERANGE;

	if (tmp == 0)

		tmp = 1;

	t.page_burst_access = (fclk_ps * tmp) / 1000;



	/*

	 * READ ... based on omap2420 TRM fig 12-19, 12-20

	 */



	/* ADV_RD_OFF = t_scsnh_advnh */

	t.adv_rd_off = next_clk(t.adv_on, t_scsnh_advnh, fclk_ps);



	/* OE_ON = t_scsnh_advnh + t_advn_oen * fclk_ps (then wait for nRDY) */

	tmp = (t.adv_rd_off * 1000) + (3 * fclk_ps);

	t.oe_on = next_clk(t.adv_on, tmp, fclk_ps);



	/* ACCESS = number of clock cycles after t_adv_eon */

	tmp = (t.oe_on * 1000) + (5 * fclk_ps);

	t.access = next_clk(t.oe_on, tmp, fclk_ps);



	/* OE_OFF = after data gets sampled */

	tmp = (t.access * 1000) + (1 * fclk_ps);

	t.oe_off = next_clk(t.access, tmp, fclk_ps);



	t.cs_rd_off = t.oe_off;



	tmp = t.cs_rd_off * 1000 + 7000 /* t_scsn_rdy_z */;

	t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps);



	/*

	 * WRITE ... based on omap2420 TRM fig 12-21

	 */



	/* ADV_WR_OFF = t_scsnh_advnh */

	t.adv_wr_off = t.adv_rd_off;



	/* WE_ON = t_scsnh_advnh + t_advn_wen * fclk_ps (then wait for nRDY) */

	tmp = (t.adv_wr_off * 1000) + (3 * fclk_ps);

	t.we_on = next_clk(t.adv_wr_off, tmp, fclk_ps);



	/* WE_OFF = number of clock cycles after t_adv_wen */

	tmp = (t.we_on * 1000) + (6 * fclk_ps);

	t.we_off = next_clk(t.we_on, tmp, fclk_ps);



	t.cs_wr_off = t.we_off;



	tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */;

	t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps);



	t.clk_activation = gpmc_ticks_to_ns(1);

	memset(&dev_t, 0, sizeof(dev_t));



	dev_t.mux = true;

	dev_t.sync_read = true;

	dev_t.sync_write = true;



	dev_t.clk = 11100;

	dev_t.t_bacc = 1000;

	dev_t.t_ces = 1000;

	dev_t.t_ceasu = 8 * 1000;

	dev_t.t_avdasu = t_scsnh_advnh - 7000;

	dev_t.t_ce_avd = 1000;

	dev_t.t_avdp_r = t_scsnh_advnh;

	dev_t.cyc_aavdh_oe = 3;

	dev_t.cyc_oe = 5;

	dev_t.t_ce_rdyz = 7000;

	dev_t.t_avdp_w = t_scsnh_advnh;

	dev_t.cyc_aavdh_we = 3;

	dev_t.cyc_wpl = 6;

	dev_t.t_ce_rdyz = 7000;



	gpmc_calc_timings(&t, &dev_t);



	return gpmc_cs_set_timings(sync_cs, &t);

}



extern unsigned long gpmc_get_fclk_period(void);



/* tusb driver calls this when it changes the chip's clocking */

int tusb6010_platform_retime(unsigned is_refclk)

{

	static const char	error[] =

		KERN_ERR "tusb6010 %s retime error %d\n";



	unsigned	fclk_ps = gpmc_get_fclk_period();

	unsigned	sysclk_ps;

	int		status;



	if (!refclk_psec || fclk_ps == 0)

	if (!refclk_psec)

		return -ENODEV;



	sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60;



	status = tusb_set_async_mode(sysclk_ps, fclk_ps);

	status = tusb_set_async_mode(sysclk_ps);

	if (status < 0) {

		printk(error, "async", status);

		goto done;

	}

	status = tusb_set_sync_mode(sysclk_ps, fclk_ps);

	status = tusb_set_sync_mode(sysclk_ps);

	if (status < 0)

		printk(error, "sync", status);

done: