Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 464abc5d authored by Michael Hennerich's avatar Michael Hennerich Committed by Bryan Wu
Browse files

[Blackfin] arch: Cleanup abd Simplify: 



 - Simplify init_arch_irq
 - Make code more readable
 - Remove useless SSYNCs
 - Fix comments

Signed-off-by: default avatarMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent ce3b7bb6

arch/blackfin/mach-common/ints-priority.c

+51 −106
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ unsigned long bfin_sic_iwr[3]; /* Up to 3 SIC_IWRx registers */ 
#endif



struct ivgx {

	/* irq number for request_irq, available in mach-bf533/irq.h */

	/* irq number for request_irq, available in mach-bf5xx/irq.h */

	unsigned int irqno;

	/* corresponding bit in the SIC_ISR register */

	unsigned int isrflag;
@@ -86,7 +86,6 @@ struct ivg_slice { 
	struct ivgx *istop;

} ivg7_13[IVG13 - IVG7 + 1];



static void search_IAR(void);



/*

 * Search SIC_IAR and fill tables with the irqvalues
@@ -120,10 +119,10 @@ static void __init search_IAR(void) 
}



/*

 * This is for BF533 internal IRQs

 * This is for core internal IRQs

 */



static void ack_noop(unsigned int irq)

static void bfin_ack_noop(unsigned int irq)

{

	/* Dummy function.  */

}
@@ -156,11 +155,11 @@ static void bfin_internal_mask_irq(unsigned int irq) 
{

#ifdef CONFIG_BF53x

	bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &

			     ~(1 << (irq - (IRQ_CORETMR + 1))));

			     ~(1 << SIC_SYSIRQ(irq)));

#else

	unsigned mask_bank, mask_bit;

	mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;

	mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;

	mask_bank = SIC_SYSIRQ(irq) / 32;

	mask_bit = SIC_SYSIRQ(irq) % 32;

	bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) &

			     ~(1 << mask_bit));

#endif
@@ -171,11 +170,11 @@ static void bfin_internal_unmask_irq(unsigned int irq) 
{

#ifdef CONFIG_BF53x

	bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() |

			     (1 << (irq - (IRQ_CORETMR + 1))));

			     (1 << SIC_SYSIRQ(irq)));

#else

	unsigned mask_bank, mask_bit;

	mask_bank = (irq - (IRQ_CORETMR + 1)) / 32;

	mask_bit = (irq - (IRQ_CORETMR + 1)) % 32;

	mask_bank = SIC_SYSIRQ(irq) / 32;

	mask_bit = SIC_SYSIRQ(irq) % 32;

	bfin_write_SIC_IMASK(mask_bank, bfin_read_SIC_IMASK(mask_bank) |

			     (1 << mask_bit));

#endif
@@ -187,8 +186,8 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state) 
{

	unsigned bank, bit;

	unsigned long flags;

	bank = (irq - (IRQ_CORETMR + 1)) / 32;

	bit = (irq - (IRQ_CORETMR + 1)) % 32;

	bank = SIC_SYSIRQ(irq) / 32;

	bit = SIC_SYSIRQ(irq) % 32;



	local_irq_save(flags);
@@ -204,13 +203,13 @@ int bfin_internal_set_wake(unsigned int irq, unsigned int state) 
#endif



static struct irq_chip bfin_core_irqchip = {

	.ack = ack_noop,

	.ack = bfin_ack_noop,

	.mask = bfin_core_mask_irq,

	.unmask = bfin_core_unmask_irq,

};



static struct irq_chip bfin_internal_irqchip = {

	.ack = ack_noop,

	.ack = bfin_ack_noop,

	.mask = bfin_internal_mask_irq,

	.unmask = bfin_internal_unmask_irq,

	.mask_ack = bfin_internal_mask_irq,
@@ -224,38 +223,23 @@ static struct irq_chip bfin_internal_irqchip = { 
#ifdef BF537_GENERIC_ERROR_INT_DEMUX

static int error_int_mask;



static void bfin_generic_error_ack_irq(unsigned int irq)

{



}



static void bfin_generic_error_mask_irq(unsigned int irq)

{

	error_int_mask &= ~(1L << (irq - IRQ_PPI_ERROR));



	if (!error_int_mask) {

		local_irq_disable();

		bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() &

				     ~(1 << (IRQ_GENERIC_ERROR -

					(IRQ_CORETMR + 1))));

		SSYNC();

		local_irq_enable();

	}

	if (!error_int_mask)

		bfin_internal_mask_irq(IRQ_GENERIC_ERROR);

}



static void bfin_generic_error_unmask_irq(unsigned int irq)

{

	local_irq_disable();

	bfin_write_SIC_IMASK(bfin_read_SIC_IMASK() | 1 <<

			     (IRQ_GENERIC_ERROR - (IRQ_CORETMR + 1)));

	SSYNC();

	local_irq_enable();



	bfin_internal_unmask_irq(IRQ_GENERIC_ERROR);

	error_int_mask |= 1L << (irq - IRQ_PPI_ERROR);

}



static struct irq_chip bfin_generic_error_irqchip = {

	.ack = bfin_generic_error_ack_irq,

	.ack = bfin_ack_noop,

	.mask_ack = bfin_generic_error_mask_irq,

	.mask = bfin_generic_error_mask_irq,

	.unmask = bfin_generic_error_unmask_irq,

};
@@ -611,7 +595,7 @@ static struct pin_int_t *pint[NR_PINT_SYS_IRQS] = { 
	(struct pin_int_t *)PINT3_MASK_SET,

};



unsigned short get_irq_base(u8 bank, u8 bmap)

inline unsigned short get_irq_base(u8 bank, u8 bmap)

{



	u16 irq_base;
@@ -978,7 +962,6 @@ int __init init_arch_irq(void) 
#else

	bfin_write_SIC_IMASK(SIC_UNMASK_ALL);

#endif

	SSYNC();



	local_irq_disable();
@@ -1000,90 +983,53 @@ int __init init_arch_irq(void) 
			set_irq_chip(irq, &bfin_core_irqchip);

		else

			set_irq_chip(irq, &bfin_internal_irqchip);

#ifdef BF537_GENERIC_ERROR_INT_DEMUX

		if (irq != IRQ_GENERIC_ERROR) {

#endif



		switch (irq) {

#if defined(CONFIG_BF53x)

		case IRQ_PROG_INTA:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

# if defined(BF537_FAMILY) && !(defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE))

		case IRQ_MAC_RX:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

# endif

#elif defined(CONFIG_BF54x)

		case IRQ_PINT0:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

		case IRQ_PINT1:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

		case IRQ_PINT2:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

		case IRQ_PINT3:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

#elif defined(CONFIG_BF52x)

		case IRQ_PORTF_INTA:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

		case IRQ_PORTG_INTA:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

		case IRQ_PORTH_INTA:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

#elif defined(CONFIG_BF561)

		case IRQ_PROG0_INTA:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

		case IRQ_PROG1_INTA:

				set_irq_chained_handler(irq,

							bfin_demux_gpio_irq);

				break;

		case IRQ_PROG2_INTA:

#endif

			set_irq_chained_handler(irq,

						bfin_demux_gpio_irq);

			break;

#ifdef BF537_GENERIC_ERROR_INT_DEMUX

		case IRQ_GENERIC_ERROR:

			set_irq_handler(irq, bfin_demux_error_irq);



			break;

#endif

		default:

			set_irq_handler(irq, handle_simple_irq);

			break;

		}

	}



#ifdef BF537_GENERIC_ERROR_INT_DEMUX

		} else {

			set_irq_handler(irq, bfin_demux_error_irq);

		}

	for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++)

		set_irq_chip_and_handler(irq, &bfin_generic_error_irqchip,

					 handle_level_irq);

#endif

	}

#ifdef BF537_GENERIC_ERROR_INT_DEMUX

	for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++) {

		set_irq_chip(irq, &bfin_generic_error_irqchip);

		set_irq_handler(irq, handle_level_irq);

	}

#endif



	for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++) {



		set_irq_chip(irq, &bfin_gpio_irqchip);

	/* if configured as edge, then will be changed to do_edge_IRQ */

		set_irq_handler(irq, handle_level_irq);

	}

	for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++)

		set_irq_chip_and_handler(irq, &bfin_gpio_irqchip,

					 handle_level_irq);





	bfin_write_IMASK(0);

	CSYNC();
@@ -1131,7 +1077,6 @@ void do_irq(int vec, struct pt_regs *fp) 
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)

		unsigned long sic_status[3];



		SSYNC();

		sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();

		sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();

#ifdef CONFIG_BF54x
@@ -1147,7 +1092,7 @@ void do_irq(int vec, struct pt_regs *fp) 
		}

#else

		unsigned long sic_status;

		SSYNC();



		sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();



		for (;; ivg++) {

include/asm-blackfin/irq.h

+2 −0
Original line number Diff line number Diff line
@@ -67,4 +67,6 @@ static __inline__ int irq_canonicalize(int irq) 
#define NO_IRQ ((unsigned int)(-1))

#endif



#define SIC_SYSIRQ(irq)	(irq - (IRQ_CORETMR + 1))



#endif				/* _BFIN_IRQ_H_ */