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Commit 45b15d98 authored by Mark Brown's avatar Mark Brown
Browse files

Merge remote-tracking branches 'spi/topic/xilinx' and 'spi/topic/xtfpga' into spi-next

parents b1ad487c 6ff8672a be8dde46

Documentation/devicetree/bindings/spi/spi-xtensa-xtfpga.txt

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Cadence Xtensa XTFPGA platform SPI controller.



This simple SPI master controller is built into xtfpga bitstreams and is used

to control daughterboard audio codec.



Required properties:

- compatible: should be "cdns,xtfpga-spi".

- reg: physical base address of the controller and length of memory mapped

  region.

MAINTAINERS

+6 −0
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@@ -9782,6 +9782,12 @@ L: linux-serial@vger.kernel.org 
S:	Maintained

F:	drivers/tty/serial/uartlite.c



XTENSA XTFPGA PLATFORM SUPPORT

M:	Max Filippov <jcmvbkbc@gmail.com>

L:	linux-xtensa@linux-xtensa.org

S:	Maintained

F:	drivers/spi/spi-xtensa-xtfpga.c



YAM DRIVER FOR AX.25

M:	Jean-Paul Roubelat <jpr@f6fbb.org>

L:	linux-hams@vger.kernel.org

drivers/spi/Kconfig

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@@ -538,6 +538,19 @@ config SPI_XILINX 


	  Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"



config SPI_XTENSA_XTFPGA

	tristate "Xtensa SPI controller for xtfpga"

	depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST

	select SPI_BITBANG

	help

	  SPI driver for xtfpga SPI master controller.



	  This simple SPI master controller is built into xtfpga bitstreams

	  and is used to control daughterboard audio codec. It always transfers

	  16 bit words in SPI mode 0, automatically asserting CS on transfer

	  start and deasserting on end.





config SPI_NUC900

	tristate "Nuvoton NUC900 series SPI"

	depends on ARCH_W90X900

drivers/spi/Makefile

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@@ -81,3 +81,4 @@ obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o 
obj-$(CONFIG_SPI_TXX9)			+= spi-txx9.o

obj-$(CONFIG_SPI_XCOMM)		+= spi-xcomm.o

obj-$(CONFIG_SPI_XILINX)		+= spi-xilinx.o

obj-$(CONFIG_SPI_XTENSA_XTFPGA)		+= spi-xtensa-xtfpga.o

drivers/spi/spi-xilinx.c

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@@ -208,26 +208,11 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on) 
}



/* spi_bitbang requires custom setup_transfer() to be defined if there is a

 * custom txrx_bufs(). We have nothing to setup here as the SPI IP block

 * supports 8 or 16 bits per word which cannot be changed in software.

 * SPI clock can't be changed in software either.

 * Check for correct bits per word. Chip select delay calculations could be

 * added here as soon as bitbang_work() can be made aware of the delay value.

 * custom txrx_bufs().

 */

static int xilinx_spi_setup_transfer(struct spi_device *spi,

		struct spi_transfer *t)

{

	struct xilinx_spi *xspi = spi_master_get_devdata(spi->master);

	u8 bits_per_word;



	bits_per_word = (t && t->bits_per_word)

			 ? t->bits_per_word : spi->bits_per_word;

	if (bits_per_word != xspi->bits_per_word) {

		dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",

			__func__, bits_per_word);

		return -EINVAL;

	}



	return 0;

}
@@ -406,6 +391,7 @@ static int xilinx_spi_probe(struct platform_device *pdev) 
		xspi->write_fn = xspi_write32_be;

	}



	master->bits_per_word_mask = SPI_BPW_MASK(bits_per_word);

	xspi->bits_per_word = bits_per_word;

	if (xspi->bits_per_word == 8) {

		xspi->tx_fn = xspi_tx8;