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Commit 45627ac6 authored by Pratyush Anand's avatar Pratyush Anand Committed by Felipe Balbi
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USB: DWC3: Put 100 ms delay for phy to be stable



Before taking core out of reset phy must be stable. So wait for 100ms
after clear phy reset.

Signed-off-by: default avatarPratyush Anand <pratyush.anand@st.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
parent 45c396ce
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+2 −0
Original line number Diff line number Diff line
@@ -148,6 +148,8 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
	reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);

	mdelay(100);

	/* After PHYs are stable we can take Core out of reset state */
	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
	reg &= ~DWC3_GCTL_CORESOFTRESET;