Commit 44ddb7ef authored Jan 22, 2015 by Mark Yao

drm/rockchip: vop: fix vop vsync/hsync polarity



Vop set wrong vsync/hsync polarity, it may cause some
display problem. known problem is that caused HDMI hdcp
authenticate failed, caused pixel offset with hdmi display.
the polarity description at RK3288 TRM doc:
  dsp_vsync_pol
    VSYNC polarity
      1'b0 : negative
      1'b1 : positive
      dsp_hsync_pol
    HSYNC polarity
      1'b0 : negative
      1'b1 : positive

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Caesar Wang <wxt@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>

parent f76c83b5

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -874,8 +874,8 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
		VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode);

		val = 0x8;
		val \|= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 1 : 0;
		val \|= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? (1 << 1) : 0;
		val \|= (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ? 0 : 1;
		val \|= (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ? 0 : (1 << 1);
		VOP_CTRL_SET(vop, pin_pol, val);

		VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) \| hsync_len);