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Commit 44d6453a authored by Ulf Hansson's avatar Ulf Hansson Committed by Mike Turquette
Browse files

clk: ux500: Register rng clock lookups for u8500 



Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 4a0ae7be

drivers/clk/ux500/u8500_clk.c

+2 −1
Original line number Diff line number Diff line
@@ -378,6 +378,7 @@ void u8500_clk_init(void) 


	clk = clk_reg_prcc_pclk("p6_pclk0", "per6clk", U8500_CLKRST6_BASE,

				BIT(0), 0);

	clk_register_clkdev(clk, "apb_pclk", "rng");



	clk = clk_reg_prcc_pclk("p6_pclk1", "per6clk", U8500_CLKRST6_BASE,

				BIT(1), 0);
@@ -518,5 +519,5 @@ void u8500_clk_init(void) 
	/* Periph6 */

	clk = clk_reg_prcc_kclk("p3_rng_kclk", "rngclk",

			U8500_CLKRST6_BASE, BIT(0), CLK_SET_RATE_GATE);



	clk_register_clkdev(clk, NULL, "rng");

}