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Commit 44194968 authored by Russell King's avatar Russell King
Browse files

ARM: proc-v7: clean up MIDR access 



We already have the main ID register available in r9, there's no need
to refetch it.  Use the saved value.

Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 17e7bf86

arch/arm/mm/proc-v7.S

+4 −5
Original line number Original line Diff line number Diff line
@@ -409,14 +409,13 @@ __v7_setup: 
	bl      v7_flush_dcache_louis

	bl      v7_flush_dcache_louis

	ldmia	r12, {r0-r5, r7, r9, r11, lr}

	ldmia	r12, {r0-r5, r7, r9, r11, lr}





	mrc	p15, 0, r0, c0, c0, 0		@ read main ID register

	and	r10, r9, #0xff000000		@ ARM?

	and	r10, r0, #0xff000000		@ ARM?

	teq	r10, #0x41000000

	teq	r10, #0x41000000

	bne	__errata_finish

	bne	__errata_finish

	and	r3, r0, #0x00f00000		@ variant

	and	r3, r9, #0x00f00000		@ variant

	and	r6, r0, #0x0000000f		@ revision

	and	r6, r9, #0x0000000f		@ revision

	orr	r6, r6, r3, lsr #20-4		@ combine variant and revision

	orr	r6, r6, r3, lsr #20-4		@ combine variant and revision

	ubfx	r0, r0, #4, #12			@ primary part number

	ubfx	r0, r9, #4, #12			@ primary part number





	/* Cortex-A8 Errata */

	/* Cortex-A8 Errata */

	ldr	r10, =0x00000c08		@ Cortex-A8 primary part number

	ldr	r10, =0x00000c08		@ Cortex-A8 primary part number