Loading arch/arm/mach-dove/pcie.c +7 −16 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) return 0; pp = &pcie_port[nr]; sys->private_data = pp; pp->root_bus_nr = sys->busnr; /* Loading Loading @@ -93,19 +94,6 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) return 1; } static struct pcie_port *bus_to_port(int bus) { int i; for (i = num_pcie_ports - 1; i >= 0; i--) { int rbus = pcie_port[i].root_bus_nr; if (rbus != -1 && rbus <= bus) break; } return i >= 0 ? pcie_port + i : NULL; } static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) { /* Loading @@ -121,7 +109,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading @@ -140,7 +129,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading Loading @@ -194,7 +184,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys) static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus->number); struct pci_sys_data *sys = dev->sysdata; struct pcie_port *pp = sys->private_data; return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0; } Loading arch/arm/mach-kirkwood/pcie.c +6 −9 Original line number Diff line number Diff line Loading @@ -44,12 +44,6 @@ struct pcie_port { static int pcie_port_map[2]; static int num_pcie_ports; static inline struct pcie_port *bus_to_port(struct pci_bus *bus) { struct pci_sys_data *sys = bus->sysdata; return sys->private_data; } static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) { /* Loading Loading @@ -79,7 +73,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { struct pcie_port *pp = bus_to_port(bus); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading @@ -98,7 +93,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { struct pcie_port *pp = bus_to_port(bus); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading Loading @@ -248,7 +244,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys) static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus); struct pci_sys_data *sys = dev->sysdata; struct pcie_port *pp = sys->private_data; return pp->irq; } Loading arch/arm/mach-mv78xx0/pcie.c +7 −16 Original line number Diff line number Diff line Loading @@ -147,6 +147,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys) return 0; pp = &pcie_port[nr]; sys->private_data = pp; pp->root_bus_nr = sys->busnr; /* Loading @@ -161,19 +162,6 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys) return 1; } static struct pcie_port *bus_to_port(int bus) { int i; for (i = num_pcie_ports - 1; i >= 0; i--) { int rbus = pcie_port[i].root_bus_nr; if (rbus != -1 && rbus <= bus) break; } return i >= 0 ? pcie_port + i : NULL; } static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) { /* Loading @@ -189,7 +177,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading @@ -208,7 +197,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading Loading @@ -263,7 +253,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys) static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus->number); struct pci_sys_data *sys = dev->bus->sysdata; struct pcie_port *pp = sys->private_data; return IRQ_MV78XX0_PCIE_00 + (pp->maj << 2) + pp->min; } Loading Loading
arch/arm/mach-dove/pcie.c +7 −16 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) return 0; pp = &pcie_port[nr]; sys->private_data = pp; pp->root_bus_nr = sys->busnr; /* Loading Loading @@ -93,19 +94,6 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys) return 1; } static struct pcie_port *bus_to_port(int bus) { int i; for (i = num_pcie_ports - 1; i >= 0; i--) { int rbus = pcie_port[i].root_bus_nr; if (rbus != -1 && rbus <= bus) break; } return i >= 0 ? pcie_port + i : NULL; } static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) { /* Loading @@ -121,7 +109,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading @@ -140,7 +129,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading Loading @@ -194,7 +184,8 @@ dove_pcie_scan_bus(int nr, struct pci_sys_data *sys) static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus->number); struct pci_sys_data *sys = dev->sysdata; struct pcie_port *pp = sys->private_data; return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0; } Loading
arch/arm/mach-kirkwood/pcie.c +6 −9 Original line number Diff line number Diff line Loading @@ -44,12 +44,6 @@ struct pcie_port { static int pcie_port_map[2]; static int num_pcie_ports; static inline struct pcie_port *bus_to_port(struct pci_bus *bus) { struct pci_sys_data *sys = bus->sysdata; return sys->private_data; } static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) { /* Loading Loading @@ -79,7 +73,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { struct pcie_port *pp = bus_to_port(bus); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading @@ -98,7 +93,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { struct pcie_port *pp = bus_to_port(bus); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading Loading @@ -248,7 +244,8 @@ kirkwood_pcie_scan_bus(int nr, struct pci_sys_data *sys) static int __init kirkwood_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus); struct pci_sys_data *sys = dev->sysdata; struct pcie_port *pp = sys->private_data; return pp->irq; } Loading
arch/arm/mach-mv78xx0/pcie.c +7 −16 Original line number Diff line number Diff line Loading @@ -147,6 +147,7 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys) return 0; pp = &pcie_port[nr]; sys->private_data = pp; pp->root_bus_nr = sys->busnr; /* Loading @@ -161,19 +162,6 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys) return 1; } static struct pcie_port *bus_to_port(int bus) { int i; for (i = num_pcie_ports - 1; i >= 0; i--) { int rbus = pcie_port[i].root_bus_nr; if (rbus != -1 && rbus <= bus) break; } return i >= 0 ? pcie_port + i : NULL; } static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) { /* Loading @@ -189,7 +177,8 @@ static int pcie_valid_config(struct pcie_port *pp, int bus, int dev) static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading @@ -208,7 +197,8 @@ static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { struct pcie_port *pp = bus_to_port(bus->number); struct pci_sys_data *sys = bus->sysdata; struct pcie_port *pp = sys->private_data; unsigned long flags; int ret; Loading Loading @@ -263,7 +253,8 @@ mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys) static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { struct pcie_port *pp = bus_to_port(dev->bus->number); struct pci_sys_data *sys = dev->bus->sysdata; struct pcie_port *pp = sys->private_data; return IRQ_MV78XX0_PCIE_00 + (pp->maj << 2) + pp->min; } Loading