Commit 434c9f2e authored Jun 16, 2017 by Maciej W. Rozycki Committed by Greg Kroah-Hartman Jul 27, 2017

MIPS: Actually decode JALX in `__compute_return_epc_for_insn'



commit a9db101b735a9d49295326ae41f610f6da62b08c upstream.

Complement commit fb6883e5 ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.

Fixes: fb6883e5 ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16394/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent f8c331cb

arch/mips/kernel/branch.c

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -556,6 +556,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
	/*		/*
	* These are unconditional and in j_format.		* These are unconditional and in j_format.
	*/		*/
			case jalx_op:
	case jal_op:		case jal_op:
	regs->regs[31] = regs->cp0_epc + 8;		regs->regs[31] = regs->cp0_epc + 8;
	case j_op:		case j_op: