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Commit 405990c7 authored by Tomeu Vizoso's avatar Tomeu Vizoso Committed by Thierry Reding
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of: Document long-ram-code property in nvidia,tegra20-apbmisc 



Needed to properly decode the RAM code register.

Signed-off-by: default avatarTomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent b787f68c

Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt

+2 −0
Original line number Diff line number Diff line
@@ -10,3 +10,5 @@ Required properties: 
       The second entry gives the physical address and length of the

       registers indicating the strapping options.



Optional properties:

- nvidia,long-ram-code: If present, the RAM code is long (4 bit). If not, short (2 bit).