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Commit 40578fca authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
Browse files

Merge commit 'gcl/merge' into merge

parents 4f917ba3 4bdf0bb7

arch/powerpc/boot/dts/cm5200.dts

+0 −1
Original line number Diff line number Diff line
@@ -210,7 +210,6 @@ 
			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d40 0x40>;

			interrupts = <2 16 0>;

			fsl5200-clocking;

		};



		sram@8000 {

arch/powerpc/boot/dts/digsy_mtc.dts

+0 −1
Original line number Diff line number Diff line
@@ -199,7 +199,6 @@ 
			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d00 0x40>;

			interrupts = <2 15 0>;

			fsl5200-clocking;



			rtc@50 {

				compatible = "at,24c08";

arch/powerpc/boot/dts/lite5200.dts

+0 −2
Original line number Diff line number Diff line
@@ -247,7 +247,6 @@ 
			compatible = "fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d00 0x40>;

			interrupts = <2 15 0>;

			fsl5200-clocking;

		};



		i2c@3d40 {
@@ -256,7 +255,6 @@ 
			compatible = "fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d40 0x40>;

			interrupts = <2 16 0>;

			fsl5200-clocking;

		};

		sram@8000 {

			compatible = "fsl,mpc5200-sram";

arch/powerpc/boot/dts/lite5200b.dts

+0 −2
Original line number Diff line number Diff line
@@ -251,7 +251,6 @@ 
			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d00 0x40>;

			interrupts = <2 15 0>;

			fsl5200-clocking;

		};



		i2c@3d40 {
@@ -260,7 +259,6 @@ 
			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d40 0x40>;

			interrupts = <2 16 0>;

			fsl5200-clocking;

		};



		sram@8000 {

arch/powerpc/boot/dts/media5200.dts

+0 −2
Original line number Diff line number Diff line
@@ -223,7 +223,6 @@ 
			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d00 0x40>;

			interrupts = <2 15 0>;

			fsl5200-clocking;

		};



		i2c@3d40 {
@@ -232,7 +231,6 @@ 
			compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";

			reg = <0x3d40 0x40>;

			interrupts = <2 16 0>;

			fsl5200-clocking;

		};



		sram@8000 {