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Commit 401fcb92 authored by Deepak Katragadda's avatar Deepak Katragadda
Browse files

ARM: dts: msm: Add the silver BIN1 table for SDM845 v2 



Add the speedbin table for the silver cluster on SDM845 v2 BIN1
parts. Not having it defined results in the corresponding v1
table being used.

Change-Id: I4e366f9d0fcc3a6854723b748938bc9b83a02a20
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent d9089f47

arch/arm64/boot/dts/qcom/sdm845-v2.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -520,6 +520,26 @@ 
		<  1689600000 0x40441058 0x00004646 0x2 17 >,

		<  1766400000 0x4044115c 0x00004a4a 0x2 18 >;



	qcom,pwrcl-speedbin1-v0 =

		<   300000000 0x000c000f 0x00002020 0x1 1 >,

		<   403200000 0x500c0115 0x00002020 0x1 2 >,

		<   480000000 0x50140219 0x00002020 0x1 3 >,

		<   576000000 0x5014031e 0x00002020 0x1 4 >,

		<   652800000 0x401c0422 0x00002020 0x1 5 >,

		<   748800000 0x401c0527 0x00002020 0x1 6 >,

		<   825600000 0x401c062b 0x00002222 0x1 7 >,

		<   902400000 0x4024072f 0x00002626 0x1 8 >,

		<   979200000 0x40240833 0x00002929 0x1 9 >,

		<  1056000000 0x402c0937 0x00002c2c 0x2 10 >,

		<  1132800000 0x402c0a3b 0x00002f2f 0x2 11 >,

		<  1228800000 0x402c0b40 0x00003333 0x2 12 >,

		<  1324800000 0x40340c45 0x00003737 0x2 13 >,

		<  1420800000 0x40340d4a 0x00003b3b 0x2 14 >,

		<  1516800000 0x403c0e4f 0x00003f3f 0x2 15 >,

		<  1612800000 0x403c0f54 0x00004343 0x2 16 >,

		<  1689600000 0x40441058 0x00004646 0x2 17 >,

		<  1766400000 0x4044115c 0x00004a4a 0x2 18 >;



	qcom,perfcl-speedbin0-v0 =

		<   300000000 0x000c000f 0x00002020 0x1 1 >,

		<   403200000 0x500c0115 0x00002020 0x1 2 >,
@@ -586,6 +606,7 @@ 
	qcom,l3-memacc-level-vc-bin1 = <8 13>;



	qcom,pwrcl-memacc-level-vc-bin0 = <12 16>;

	qcom,pwrcl-memacc-level-vc-bin1 = <12 16>;



	qcom,perfcl-memacc-level-vc-bin0 = <14 22>;

	qcom,perfcl-memacc-level-vc-bin1 = <14 22>;