Merge branch 'devel-stable' into for-linus

Optional properties:

- interrupt-affinity : Valid only when using SPIs, specifies a list of phandles

                       to CPU nodes corresponding directly to the affinity of

- interrupt-affinity : When using SPIs, specifies a list of phandles to CPU

                       nodes corresponding directly to the affinity of

		       the SPIs listed in the interrupts property.

                       When using a PPI, specifies a list of phandles to CPU

		       nodes corresponding to the set of CPUs which have

		       a PMU of this type signalling the PPI listed in the

		       interrupts property.

                       This property should be present when there is more than

		       a single SPI.

- qcom,no-pc-write : Indicates that this PMU doesn't support the 0xc and 0xd

                     events.

ARM PMU PROFILING AND DEBUGGING

M:	Will Deacon <will.deacon@arm.com>

S:	Maintained

F:	arch/arm/kernel/perf_event*

F:	arch/arm/kernel/perf_*

F:	arch/arm/oprofile/common.c

F:	arch/arm/include/asm/pmu.h

F:	arch/arm/kernel/hw_breakpoint.c

F:	arch/arm/include/asm/hw_breakpoint.h

F:	arch/arm/include/asm/perf_event.h

F:	drivers/perf/arm_pmu.c

F:	include/linux/perf/arm_pmu.h

ARM PORT

M:	Russell King <linux@arm.linux.org.uk>

F:	include/linux/power_supply.h

F:	drivers/power/

POWER STATE COORDINATION INTERFACE (PSCI)

M:	Mark Rutland <mark.rutland@arm.com>

M:	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

L:	linux-arm-kernel@lists.infradead.org

S:	Maintained

F:	drivers/firmware/psci.c

F:	include/linux/psci.h

F:	include/uapi/linux/psci.h

PNP SUPPORT

M:	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>

S:	Maintained

config ARM_PSCI

	bool "Support for the ARM Power State Coordination Interface (PSCI)"

	depends on CPU_V7

	select ARM_PSCI_FW

	help

	  Say Y here if you want Linux to communicate with system firmware

	  implementing the PSCI specification for CPU-centric power

	  the remainder of userspace will become appropriately inaccessible.

config HW_PERF_EVENTS

	bool "Enable hardware performance counter support for perf events"

	depends on PERF_EVENTS

	default y

	help

	  Enable hardware performance counter support for perf events. If

	  disabled, perf events will use software events only.

	def_bool y

	depends on ARM_PMU

config SYS_SUPPORTS_HUGETLBFS

       def_bool y

#ifndef __ASM_ARM_PSCI_H

#define __ASM_ARM_PSCI_H

#define PSCI_POWER_STATE_TYPE_STANDBY		0

#define PSCI_POWER_STATE_TYPE_POWER_DOWN	1

struct psci_power_state {

	u16	id;

	u8	type;

	u8	affinity_level;

};

struct psci_operations {

	int (*cpu_suspend)(struct psci_power_state state,

			   unsigned long entry_point);

	int (*cpu_off)(struct psci_power_state state);

	int (*cpu_on)(unsigned long cpuid, unsigned long entry_point);

	int (*migrate)(unsigned long cpuid);

	int (*affinity_info)(unsigned long target_affinity,

			unsigned long lowest_affinity_level);

	int (*migrate_info_type)(void);

};

extern struct psci_operations psci_ops;

extern struct smp_operations psci_smp_ops;

#ifdef CONFIG_ARM_PSCI

int psci_init(void);

bool psci_smp_available(void);

#else

static inline int psci_init(void) { return 0; }

static inline bool psci_smp_available(void) { return false; }

#endif

obj-$(CONFIG_CPU_PJ4B)		+= pj4-cp0.o

obj-$(CONFIG_IWMMXT)		+= iwmmxt.o

obj-$(CONFIG_PERF_EVENTS)	+= perf_regs.o perf_callchain.o

obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event.o \

				   perf_event_xscale.o perf_event_v6.o \

obj-$(CONFIG_HW_PERF_EVENTS)	+= perf_event_xscale.o perf_event_v6.o \

				   perf_event_v7.o

CFLAGS_pj4-cp0.o		:= -marm

AFLAGS_iwmmxt.o			:= -Wa,-mcpu=iwmmxt

obj-$(CONFIG_ARM_VIRT_EXT)	+= hyp-stub.o

ifeq ($(CONFIG_ARM_PSCI),y)

obj-y				+= psci.o psci-call.o

obj-y				+= psci-call.o

obj-$(CONFIG_SMP)		+= psci_smp.o

endif