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Commit 3fe015ee authored by Dhaval Patel's avatar Dhaval Patel
Browse files

drm/msm/sde: remove bandwdith ctrl handling 



The power handles added API to add refcouting if
any client is enabled or not for bus bandwidth
ctrl and then send the vote to bus driver. This
should be handled through core perf bandwidth
calculation instead of separate API to enable/disable.
This patch simplifies the logic and allows the
core perf client to send the vote when it is ready.

Change-Id: Ie2fbc8eaf378630fff0ca1629f82caa179487b6f
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent 020f7e12

drivers/gpu/drm/msm/sde/sde_crtc.c

+0 −6
Original line number Diff line number Diff line
@@ -542,8 +542,6 @@ static void sde_crtc_frame_event_work(struct kthread_work *work) 
					crtc->base.id,

					ktime_to_ns(fevent->ts));

			SDE_EVT32(DRMID(crtc), fevent->event, 1);

			sde_power_data_bus_bandwidth_ctrl(&priv->phandle,

					sde_kms->core_client, false);

			sde_core_perf_crtc_release_bw(crtc);

		} else {

			SDE_EVT32(DRMID(crtc), fevent->event, 2);
@@ -1003,8 +1001,6 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc) 
		/* acquire bandwidth and other resources */

		SDE_DEBUG("crtc%d first commit\n", crtc->base.id);

		SDE_EVT32(DRMID(crtc), 1);

		sde_power_data_bus_bandwidth_ctrl(&priv->phandle,

				sde_kms->core_client, true);

	} else {

		SDE_DEBUG("crtc%d commit\n", crtc->base.id);

		SDE_EVT32(DRMID(crtc), 2);
@@ -1129,8 +1125,6 @@ static void sde_crtc_disable(struct drm_crtc *crtc) 
		SDE_ERROR("crtc%d invalid frame pending\n",

				crtc->base.id);

		SDE_EVT32(DRMID(crtc));

		sde_power_data_bus_bandwidth_ctrl(&priv->phandle,

				sde_kms->core_client, false);

		sde_core_perf_crtc_release_bw(crtc);

		atomic_set(&sde_crtc->frame_pending, 0);

	}

drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c

+0 −6
Original line number Diff line number Diff line
@@ -506,9 +506,6 @@ static void sde_encoder_phys_vid_enable(struct sde_encoder_phys *phys_enc) 
	if (WARN_ON(!vid_enc->hw_intf->ops.enable_timing))

		return;



	sde_power_data_bus_bandwidth_ctrl(&priv->phandle,

			phys_enc->sde_kms->core_client, true);



	sde_encoder_helper_split_config(phys_enc, vid_enc->hw_intf->idx);



	sde_encoder_phys_vid_setup_timing_engine(phys_enc);
@@ -740,9 +737,6 @@ static void sde_encoder_phys_vid_disable(struct sde_encoder_phys *phys_enc) 
		sde_encoder_phys_vid_control_vblank_irq(phys_enc, false);

	}



	sde_power_data_bus_bandwidth_ctrl(&priv->phandle,

			phys_enc->sde_kms->core_client, false);



	if (atomic_read(&phys_enc->vblank_refcount))

		SDE_ERROR_VIDENC(vid_enc, "invalid vblank refcount %d\n",

				atomic_read(&phys_enc->vblank_refcount));

drivers/gpu/drm/msm/sde_power_handle.c

+4 −58
Original line number Diff line number Diff line
@@ -371,14 +371,11 @@ static int _sde_power_data_bus_set_quota( 
	pdbus->curr_bw_uc_idx = new_uc_idx;

	pdbus->ao_bw_uc_idx = new_uc_idx;



	if ((pdbus->bus_ref_cnt == 0) && pdbus->curr_bw_uc_idx) {

		rc = 0;

	} else { /* vote BW if bus_bw_cnt > 0 or uc_idx is zero */

	SDE_ATRACE_BEGIN("msm_bus_scale_req");

	rc = msm_bus_scale_client_update_request(pdbus->data_bus_hdl,

			new_uc_idx);

	SDE_ATRACE_END("msm_bus_scale_req");

	}



	return rc;

}
@@ -583,57 +580,6 @@ static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) 
}

#endif



void sde_power_data_bus_bandwidth_ctrl(struct sde_power_handle *phandle,

		struct sde_power_client *pclient, int enable)

{

	struct sde_power_data_bus_handle *pdbus;

	int changed = 0;



	if (!phandle || !pclient) {

		pr_err("invalid power/client handle\n");

		return;

	}



	pdbus = &phandle->data_bus_handle;



	mutex_lock(&phandle->phandle_lock);

	if (enable) {

		if (pdbus->bus_ref_cnt == 0)

			changed++;

		pdbus->bus_ref_cnt++;

	} else {

		if (pdbus->bus_ref_cnt) {

			pdbus->bus_ref_cnt--;

			if (pdbus->bus_ref_cnt == 0)

				changed++;

		} else {

			pr_debug("Can not be turned off\n");

		}

	}



	pr_debug("%pS: task:%s bw_cnt=%d changed=%d enable=%d\n",

		__builtin_return_address(0), current->group_leader->comm,

		pdbus->bus_ref_cnt, changed, enable);



	if (changed) {

		SDE_ATRACE_INT("data_bus_ctrl", enable);



		if (!enable) {

			if (!pdbus->handoff_pending) {

				msm_bus_scale_client_update_request(

						pdbus->data_bus_hdl, 0);

				pdbus->ao_bw_uc_idx = 0;

			}

		} else {

			msm_bus_scale_client_update_request(

					pdbus->data_bus_hdl,

					pdbus->curr_bw_uc_idx);

		}

	}



	mutex_unlock(&phandle->phandle_lock);

}



int sde_power_resource_init(struct platform_device *pdev,

	struct sde_power_handle *phandle)

{

drivers/gpu/drm/msm/sde_power_handle.h

+1 −5
Original line number Diff line number Diff line 
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -75,8 +75,6 @@ struct sde_power_client { 
 * @bus_channels: number of memory bus channels

 * @curr_bw_uc_idx: current use case index of data bus

 * @ao_bw_uc_idx: active only use case index of data bus

 * @bus_ref_cnt: reference count of data bus enable request

 * @handoff_pending: True to indicate if bootloader hand-over is pending

 */

struct sde_power_data_bus_handle {

	struct msm_bus_scale_pdata *data_bus_scale_table;
@@ -86,8 +84,6 @@ struct sde_power_data_bus_handle { 
	u32 bus_channels;

	u32 curr_bw_uc_idx;

	u32 ao_bw_uc_idx;

	u32 bus_ref_cnt;

	int handoff_pending;

};



/**