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Commit 3f84ccf6 authored by Hans de Goede's avatar Hans de Goede Committed by Linus Walleij
Browse files

pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller 



Add pinmuxing for external interrupt functionality through the
sun6i "r" pincontroller.

Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 8297992c

drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c

+18 −6
Original line number Diff line number Diff line
@@ -47,45 +47,57 @@ static const struct sunxi_desc_pin sun6i_a31_r_pins[] = { 
	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 5),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 0),	/* PL_EINT0 */

		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* MS */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 6),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 1),	/* PL_EINT1 */

		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* CK */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 7),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 2),	/* PL_EINT2 */

		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* DO */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(L, 8),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 0, 3),	/* PL_EINT3 */

		  SUNXI_FUNCTION(0x3, "s_jtag")),	/* DI */

	/* Hole */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 0),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out")),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 0)),	/* PM_EINT0 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 1),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out")),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 1)),	/* PM_EINT1 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 2),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 2),	/* PM_EINT2 */

		  SUNXI_FUNCTION(0x3, "1wire")),

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 3),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out")),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 3)),	/* PM_EINT3 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 4),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out")),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 4)),	/* PM_EINT4 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 5),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out")),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 5)),	/* PM_EINT5 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 6),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out")),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 6)),	/* PM_EINT6 */

	SUNXI_PIN(SUNXI_PINCTRL_PIN(M, 7),

		  SUNXI_FUNCTION(0x0, "gpio_in"),

		  SUNXI_FUNCTION(0x1, "gpio_out"),

		  SUNXI_FUNCTION_IRQ_BANK(0x2, 1, 7),	/* PM_EINT7 */

		  SUNXI_FUNCTION(0x3, "rtc")),		/* CLKO */

};