Revert "powerpc/83xx: gianfar_ptp: select 1588 clock source through dts file"

Clock Properties:

  - fsl,cksel        Timer reference clock source.

  - fsl,tclk-period  Timer reference clock period in nanoseconds.

  - fsl,tmr-prsc     Prescaler, divides the output clock.

  - fsl,tmr-add      Frequency compensation value.

  clock. You must choose these carefully for the clock to work right.

  Here is how to figure good values:

  TimerOsc     = selected reference clock   MHz

  TimerOsc     = system clock               MHz

  tclk_period  = desired clock period       nanoseconds

  NominalFreq  = 1000 / tclk_period         MHz

  FreqDivRatio = TimerOsc / NominalFreq     (must be greater that 1.0)

  Pulse Per Second (PPS) signal, since this will be offered to the PPS

  subsystem to synchronize the Linux clock.

  "fsl,cksel" property allows to select different reference clock

  sources:

  <0> - external high precision timer reference clock (TSEC_TMR_CLK

        input is used for this purpose);

  <1> - eTSEC system clock;

  <2> - eTSEC1 transmit clock;

  <3> - RTC clock input.

  When this attribute is not used, eTSEC system clock will serve as

  IEEE 1588 timer reference clock.

Example:

	ptp_clock@24E00 {

		reg = <0x24E00 0xB0>;

		interrupts = <12 0x8 13 0x8>;

		interrupt-parent = < &ipic >;

		fsl,cksel       = <1>;

		fsl,tclk-period = <10>;

		fsl,tmr-prsc    = <100>;

		fsl,tmr-add     = <0x999999A4>;

	err = -ENODEV;

	etsects->caps = ptp_gianfar_caps;

	if (get_of_u32(node, "fsl,cksel", &etsects->cksel))

	etsects->cksel = DEFAULT_CKSEL;

	if (get_of_u32(node, "fsl,tclk-period", &etsects->tclk_period) ||