Loading drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -270,6 +270,7 @@ enum adreno_preempt_states { * preempt_level: The level of preemption (for 6XX) * skipsaverestore: To skip saverestore during L1 preemption (for 6XX) * usesgmem: enable GMEM save/restore across preemption (for 6XX) * count: Track the number of preemptions triggered */ struct adreno_preemption { atomic_t state; Loading @@ -280,6 +281,7 @@ struct adreno_preemption { unsigned int preempt_level; bool skipsaverestore; bool usesgmem; unsigned int count; }; Loading drivers/gpu/msm/adreno_a6xx_preempt.c +2 −0 Original line number Diff line number Diff line Loading @@ -292,6 +292,8 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) kgsl_sharedmem_writel(device, &next->preemption_desc, PREEMPT_RECORD(wptr), next->wptr); preempt->count++; spin_unlock_irqrestore(&next->preempt_lock, flags); /* And write it to the smmu info */ Loading drivers/gpu/msm/adreno_sysfs.c +19 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,13 @@ struct adreno_sysfs_attribute adreno_attr_##_name = { \ .store = _ ## _name ## _store, \ } #define _ADRENO_SYSFS_ATTR_RO(_name, __show) \ struct adreno_sysfs_attribute adreno_attr_##_name = { \ .attr = __ATTR(_name, 0644, __show, NULL), \ .show = _ ## _name ## _show, \ .store = NULL, \ } #define ADRENO_SYSFS_ATTR(_a) \ container_of((_a), struct adreno_sysfs_attribute, attr) Loading Loading @@ -331,6 +338,13 @@ static unsigned int _ifpc_show(struct adreno_device *adreno_dev) return kgsl_gmu_isenabled(device) && gmu->idle_level >= GPU_HW_IFPC; } static unsigned int _preempt_count_show(struct adreno_device *adreno_dev) { struct adreno_preemption *preempt = &adreno_dev->preempt; return preempt->count; } static ssize_t _sysfs_store_u32(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) Loading Loading @@ -411,9 +425,13 @@ static ssize_t _sysfs_show_bool(struct device *dev, #define ADRENO_SYSFS_U32(_name) \ _ADRENO_SYSFS_ATTR(_name, _sysfs_show_u32, _sysfs_store_u32) #define ADRENO_SYSFS_RO_U32(_name) \ _ADRENO_SYSFS_ATTR_RO(_name, _sysfs_show_u32) static ADRENO_SYSFS_U32(ft_policy); static ADRENO_SYSFS_U32(ft_pagefault_policy); static ADRENO_SYSFS_U32(preempt_level); static ADRENO_SYSFS_RO_U32(preempt_count); static ADRENO_SYSFS_BOOL(usesgmem); static ADRENO_SYSFS_BOOL(skipsaverestore); static ADRENO_SYSFS_BOOL(ft_long_ib_detect); Loading Loading @@ -451,6 +469,7 @@ static const struct device_attribute *_attr_list[] = { &adreno_attr_usesgmem.attr, &adreno_attr_skipsaverestore.attr, &adreno_attr_ifpc.attr, &adreno_attr_preempt_count.attr, NULL, }; Loading Loading
drivers/gpu/msm/adreno.h +2 −0 Original line number Diff line number Diff line Loading @@ -270,6 +270,7 @@ enum adreno_preempt_states { * preempt_level: The level of preemption (for 6XX) * skipsaverestore: To skip saverestore during L1 preemption (for 6XX) * usesgmem: enable GMEM save/restore across preemption (for 6XX) * count: Track the number of preemptions triggered */ struct adreno_preemption { atomic_t state; Loading @@ -280,6 +281,7 @@ struct adreno_preemption { unsigned int preempt_level; bool skipsaverestore; bool usesgmem; unsigned int count; }; Loading
drivers/gpu/msm/adreno_a6xx_preempt.c +2 −0 Original line number Diff line number Diff line Loading @@ -292,6 +292,8 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) kgsl_sharedmem_writel(device, &next->preemption_desc, PREEMPT_RECORD(wptr), next->wptr); preempt->count++; spin_unlock_irqrestore(&next->preempt_lock, flags); /* And write it to the smmu info */ Loading
drivers/gpu/msm/adreno_sysfs.c +19 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,13 @@ struct adreno_sysfs_attribute adreno_attr_##_name = { \ .store = _ ## _name ## _store, \ } #define _ADRENO_SYSFS_ATTR_RO(_name, __show) \ struct adreno_sysfs_attribute adreno_attr_##_name = { \ .attr = __ATTR(_name, 0644, __show, NULL), \ .show = _ ## _name ## _show, \ .store = NULL, \ } #define ADRENO_SYSFS_ATTR(_a) \ container_of((_a), struct adreno_sysfs_attribute, attr) Loading Loading @@ -331,6 +338,13 @@ static unsigned int _ifpc_show(struct adreno_device *adreno_dev) return kgsl_gmu_isenabled(device) && gmu->idle_level >= GPU_HW_IFPC; } static unsigned int _preempt_count_show(struct adreno_device *adreno_dev) { struct adreno_preemption *preempt = &adreno_dev->preempt; return preempt->count; } static ssize_t _sysfs_store_u32(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) Loading Loading @@ -411,9 +425,13 @@ static ssize_t _sysfs_show_bool(struct device *dev, #define ADRENO_SYSFS_U32(_name) \ _ADRENO_SYSFS_ATTR(_name, _sysfs_show_u32, _sysfs_store_u32) #define ADRENO_SYSFS_RO_U32(_name) \ _ADRENO_SYSFS_ATTR_RO(_name, _sysfs_show_u32) static ADRENO_SYSFS_U32(ft_policy); static ADRENO_SYSFS_U32(ft_pagefault_policy); static ADRENO_SYSFS_U32(preempt_level); static ADRENO_SYSFS_RO_U32(preempt_count); static ADRENO_SYSFS_BOOL(usesgmem); static ADRENO_SYSFS_BOOL(skipsaverestore); static ADRENO_SYSFS_BOOL(ft_long_ib_detect); Loading Loading @@ -451,6 +469,7 @@ static const struct device_attribute *_attr_list[] = { &adreno_attr_usesgmem.attr, &adreno_attr_skipsaverestore.attr, &adreno_attr_ifpc.attr, &adreno_attr_preempt_count.attr, NULL, }; Loading