clk: msm: Update pll clock ops for SDM439/SDM429

pll hardware on SDM439/429 requires 50uSec to stabilise
after it has been brought out of reset. Update pll clock ops
where we add 50uSec delay before polling pll lock status.

Change-Id: Ib2b7c5c5be3fbb0ab64b5f9c06d6aaaede479a32
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>