Commit 3e7d9056 authored Nov 29, 2017 by Dhaval Patel

drm/dsi-staging: account for h_active for pixel clk calculation



DSI driver calculates the pixel clk and notifies client
about the rate to make the MDP clock rate. It should consider
only h_active to avoid bumping up MDP clock based on full
h_total. That will save power by not crossing voltage corner
 for MDP clock.

Change-Id: Ic8136ab5b75deae19ada9e0e953ffa44f53cfe00
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>

parent 2fed71ce

drivers/gpu/drm/msm/dsi-staging/dsi_panel.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -2143,7 +2143,7 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
		priv_info->phy_timing_len = len;
		};

		mode->pixel_clk_khz = (DSI_H_TOTAL(&mode->timing) *
		mode->pixel_clk_khz = (mode->timing.h_active *
		DSI_V_TOTAL(&mode->timing) *
		mode->timing.refresh_rate) / 1000;
		return rc;