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Commit 3dc95666 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (51 commits)
  MIPS: BCM63xx: Add integrated ethernet mac support.
  MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.
  MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.
  MIPS: Octeon:  Move some platform device registration to its own file.
  MIPS: Don't corrupt page tables on vmalloc fault.
  MIPS: Shrink the size of tlb handler
  MIPS: Alchemy: override loops_per_jiffy detection
  MIPS: hw_random: Add hardware RNG for Octeon SOCs.
  MIPS: Octeon:  Add hardware RNG platform device.
  MIPS: Remove useless zero initializations.
  MIPS: Alchemy: get rid of allow_au1k_wait
  MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.
  MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.
  MIPS: Get rid of CONFIG_CPU_HAS_LLSC
  MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSC
  MIPS: Rewrite clearing of ll_bit on context switch in C
  MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assembler
  MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file.
  MIPS: Clean up linker script using new linker script macros.
  MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE.
  ...
parents b938fb6f 9b1fc55a

Documentation/kernel-parameters.txt

+4 −0
Original line number Diff line number Diff line
@@ -1286,6 +1286,10 @@ and is between 256 and 4096 characters. It is defined in the file 
			(machvec) in a generic kernel.

			Example: machvec=hpzx1_swiotlb



	machtype=	[Loongson] Share the same kernel image file between different

			 yeeloong laptop.

			Example: machtype=lemote-yeeloong-2f-7inch



	max_addr=nn[KMG]	[KNL,BOOT,ia64] All physical memory greater

			than or equal to this physical address is ignored.

arch/mips/Kconfig

+37 −51
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ config MIPS 
	select HAVE_ARCH_KGDB

	# Horrible source of confusion.  Die, die, die ...

	select EMBEDDED

	select RTC_LIB

	select RTC_LIB if !LEMOTE_FULOONG2E



mainmenu "Linux/MIPS Kernel Configuration"
@@ -80,6 +80,21 @@ config BCM47XX 
	help

	 Support for BCM47XX based boards



config BCM63XX

	bool "Broadcom BCM63XX based boards"

	select CEVT_R4K

	select CSRC_R4K

	select DMA_NONCOHERENT

	select IRQ_CPU

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SWAP_IO_SPACE

	select ARCH_REQUIRE_GPIOLIB

	help

	 Support for BCM63XX based boards



config MIPS_COBALT

	bool "Cobalt Server"

	select CEVT_R4K
@@ -174,30 +189,15 @@ config LASAT 
	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN

	select SYS_SUPPORTS_LITTLE_ENDIAN



config LEMOTE_FULONG

	bool "Lemote Fulong mini-PC"

	select ARCH_SPARSEMEM_ENABLE

	select CEVT_R4K

	select CSRC_R4K

	select SYS_HAS_CPU_LOONGSON2

	select DMA_NONCOHERENT

	select BOOT_ELF32

	select BOARD_SCACHE

	select HAVE_STD_PC_SERIAL_PORT

	select HW_HAS_PCI

	select I8259

	select ISA

	select IRQ_CPU

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_64BIT_KERNEL

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_HIGHMEM

	select SYS_HAS_EARLY_PRINTK

	select GENERIC_ISA_DMA_SUPPORT_BROKEN

	select CPU_HAS_WB

config MACH_LOONGSON

	bool "Loongson family of machines"

	help

	  Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and

	  an FPGA northbridge

	  This enables the support of Loongson family of machines.



	  Loongson is a family of general-purpose MIPS-compatible CPUs.

	  developed at Institute of Computing Technology (ICT),

	  Chinese Academy of Sciences (CAS) in the People's Republic

	  of China. The chief architect is Professor Weiwu Hu.



config MIPS_MALTA

	bool "MIPS Malta board"
@@ -660,6 +660,7 @@ endchoice 


source "arch/mips/alchemy/Kconfig"

source "arch/mips/basler/excite/Kconfig"

source "arch/mips/bcm63xx/Kconfig"

source "arch/mips/jazz/Kconfig"

source "arch/mips/lasat/Kconfig"

source "arch/mips/pmc-sierra/Kconfig"
@@ -668,6 +669,7 @@ source "arch/mips/sibyte/Kconfig" 
source "arch/mips/txx9/Kconfig"

source "arch/mips/vr41xx/Kconfig"

source "arch/mips/cavium-octeon/Kconfig"

source "arch/mips/loongson/Kconfig"



endmenu
@@ -1044,12 +1046,10 @@ choice 
	prompt "CPU type"

	default CPU_R4X00



config CPU_LOONGSON2

	bool "Loongson 2"

	depends on SYS_HAS_CPU_LOONGSON2

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM

config CPU_LOONGSON2E

	bool "Loongson 2E"

	depends on SYS_HAS_CPU_LOONGSON2E

	select CPU_LOONGSON2

	help

	  The Loongson 2E processor implements the MIPS III instruction set

	  with many extensions.
@@ -1057,7 +1057,6 @@ config CPU_LOONGSON2 
config CPU_MIPS32_R1

	bool "MIPS32 Release 1"

	depends on SYS_HAS_CPU_MIPS32_R1

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM
@@ -1075,7 +1074,6 @@ config CPU_MIPS32_R1 
config CPU_MIPS32_R2

	bool "MIPS32 Release 2"

	depends on SYS_HAS_CPU_MIPS32_R2

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM
@@ -1089,7 +1087,6 @@ config CPU_MIPS32_R2 
config CPU_MIPS64_R1

	bool "MIPS64 Release 1"

	depends on SYS_HAS_CPU_MIPS64_R1

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1109,7 +1106,6 @@ config CPU_MIPS64_R1 
config CPU_MIPS64_R2

	bool "MIPS64 Release 2"

	depends on SYS_HAS_CPU_MIPS64_R2

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1155,7 +1151,6 @@ config CPU_VR41XX 
config CPU_R4300

	bool "R4300"

	depends on SYS_HAS_CPU_R4300

	select CPU_HAS_LLSC

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	help
@@ -1164,7 +1159,6 @@ config CPU_R4300 
config CPU_R4X00

	bool "R4x00"

	depends on SYS_HAS_CPU_R4X00

	select CPU_HAS_LLSC

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	help
@@ -1174,7 +1168,6 @@ config CPU_R4X00 
config CPU_TX49XX

	bool "R49XX"

	depends on SYS_HAS_CPU_TX49XX

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1182,7 +1175,6 @@ config CPU_TX49XX 
config CPU_R5000

	bool "R5000"

	depends on SYS_HAS_CPU_R5000

	select CPU_HAS_LLSC

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	help
@@ -1191,14 +1183,12 @@ config CPU_R5000 
config CPU_R5432

	bool "R5432"

	depends on SYS_HAS_CPU_R5432

	select CPU_HAS_LLSC

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL



config CPU_R5500

	bool "R5500"

	depends on SYS_HAS_CPU_R5500

	select CPU_HAS_LLSC

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	select CPU_SUPPORTS_HUGEPAGES
@@ -1209,7 +1199,6 @@ config CPU_R5500 
config CPU_R6000

	bool "R6000"

	depends on EXPERIMENTAL

	select CPU_HAS_LLSC

	depends on SYS_HAS_CPU_R6000

	select CPU_SUPPORTS_32BIT_KERNEL

	help
@@ -1219,7 +1208,6 @@ config CPU_R6000 
config CPU_NEVADA

	bool "RM52xx"

	depends on SYS_HAS_CPU_NEVADA

	select CPU_HAS_LLSC

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	help
@@ -1229,7 +1217,6 @@ config CPU_R8000 
	bool "R8000"

	depends on EXPERIMENTAL

	depends on SYS_HAS_CPU_R8000

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_64BIT_KERNEL

	help
@@ -1239,7 +1226,6 @@ config CPU_R8000 
config CPU_R10000

	bool "R10000"

	depends on SYS_HAS_CPU_R10000

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1250,7 +1236,6 @@ config CPU_R10000 
config CPU_RM7000

	bool "RM7000"

	depends on SYS_HAS_CPU_RM7000

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1259,7 +1244,6 @@ config CPU_RM7000 
config CPU_RM9000

	bool "RM9000"

	depends on SYS_HAS_CPU_RM9000

	select CPU_HAS_LLSC

	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL
@@ -1269,7 +1253,6 @@ config CPU_RM9000 
config CPU_SB1

	bool "SB1"

	depends on SYS_HAS_CPU_SB1

	select CPU_HAS_LLSC

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM
@@ -1296,7 +1279,13 @@ config CPU_CAVIUM_OCTEON 


endchoice



config SYS_HAS_CPU_LOONGSON2

config CPU_LOONGSON2

	bool

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_64BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM



config SYS_HAS_CPU_LOONGSON2E

	bool



config SYS_HAS_CPU_MIPS32_R1
@@ -1683,9 +1672,6 @@ config SB1_PASS_2_1_WORKAROUNDS 
config 64BIT_PHYS_ADDR

	bool



config CPU_HAS_LLSC

	bool



config CPU_HAS_SMARTMIPS

	depends on SYS_SUPPORTS_SMARTMIPS

	bool "Support for the SmartMIPS ASE"

arch/mips/Makefile

+17 −5
Original line number Diff line number Diff line
@@ -120,7 +120,11 @@ cflags-$(CONFIG_CPU_R4300) += -march=r4300 -Wa,--trap 
cflags-$(CONFIG_CPU_VR41XX)	+= -march=r4100 -Wa,--trap

cflags-$(CONFIG_CPU_R4X00)	+= -march=r4600 -Wa,--trap

cflags-$(CONFIG_CPU_TX49XX)	+= -march=r4600 -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON2)	+= -march=r4600 -Wa,--trap

# only gcc >= 4.4 have the loongson-specific support

cflags-$(CONFIG_CPU_LOONGSON2)	+= -Wa,--trap

cflags-$(CONFIG_CPU_LOONGSON2E) += \

	$(call cc-option,-march=loongson2e,-march=r4600)



cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \

			-Wa,-mips32 -Wa,--trap

cflags-$(CONFIG_CPU_MIPS32_R2)	+= $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
@@ -314,11 +318,12 @@ cflags-$(CONFIG_WR_PPMC) += -I$(srctree)/arch/mips/include/asm/mach-wrppmc 
load-$(CONFIG_WR_PPMC)		+= 0xffffffff80100000



#

# lemote fulong mini-PC board

# Loongson family

#

core-$(CONFIG_LEMOTE_FULONG) +=arch/mips/lemote/lm2e/

load-$(CONFIG_LEMOTE_FULONG) +=0xffffffff80100000

cflags-$(CONFIG_LEMOTE_FULONG) += -I$(srctree)/arch/mips/include/asm/mach-lemote

core-$(CONFIG_MACH_LOONGSON) +=arch/mips/loongson/

cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \

                    -mno-branch-likely

load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000



#

# MIPS Malta board
@@ -559,6 +564,13 @@ core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/ 
cflags-$(CONFIG_BCM47XX)	+= -I$(srctree)/arch/mips/include/asm/mach-bcm47xx

load-$(CONFIG_BCM47XX)		:= 0xffffffff80001000



#

# Broadcom BCM63XX boards

#

core-$(CONFIG_BCM63XX)		+= arch/mips/bcm63xx/

cflags-$(CONFIG_BCM63XX)	+= -I$(srctree)/arch/mips/include/asm/mach-bcm63xx/

load-$(CONFIG_BCM63XX)		:= 0xffffffff80010000



#

# SNI RM

#

arch/mips/alchemy/common/setup.c

+4 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 


#include <linux/init.h>

#include <linux/ioport.h>

#include <linux/jiffies.h>

#include <linux/module.h>

#include <linux/pm.h>
@@ -53,6 +54,9 @@ void __init plat_mem_setup(void) 
	printk(KERN_INFO "(PRId %08x) @ %lu.%02lu MHz\n", read_c0_prid(),

	       est_freq / 1000000, ((est_freq % 1000000) * 100) / 1000000);



	/* this is faster than wasting cycles trying to approximate it */

	preset_lpj = (est_freq >> 1) / HZ;



	_machine_restart = au1000_restart;

	_machine_halt = au1000_halt;

	pm_power_off = au1000_power_off;

arch/mips/alchemy/common/time.c

+9 −6
Original line number Diff line number Diff line
@@ -36,14 +36,13 @@ 
#include <linux/interrupt.h>

#include <linux/spinlock.h>



#include <asm/processor.h>

#include <asm/time.h>

#include <asm/mach-au1x00/au1000.h>



/* 32kHz clock enabled and detected */

#define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S)



extern int allow_au1k_wait; /* default off for CP0 Counter */



static cycle_t au1x_counter1_read(struct clocksource *cs)

{

	return au_readl(SYS_RTCREAD);
@@ -153,13 +152,17 @@ void __init plat_time_init(void) 


	printk(KERN_INFO "Alchemy clocksource installed\n");



	/* can now use 'wait' */

	allow_au1k_wait = 1;

	return;



cntr_err:

	/* counters unusable, use C0 counter */

	/*

	 * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this

	 * function is called.  Because the Alchemy counters are unusable

	 * the C0 timekeeping code is installed and use of the 'wait'

	 * instruction must be prohibited, which is done most easily by

	 * assigning NULL to cpu_wait.

	 */

	cpu_wait = NULL;

	r4k_clockevent_init();

	init_r4k_clocksource();

	allow_au1k_wait = 0;

}