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Commit 3c0b26d5 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "include: qcom-geni: Correct the mode switch sequence." into msm-4.9

parents e7fb60a3 a95a3614
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+17 −0
Original line number Original line Diff line number Diff line
@@ -87,6 +87,7 @@ struct se_geni_rsc {
#define SE_GENI_RX_RFR_WATERMARK_REG	(0x814)
#define SE_GENI_RX_RFR_WATERMARK_REG	(0x814)
#define SE_GENI_M_GP_LENGTH		(0x910)
#define SE_GENI_M_GP_LENGTH		(0x910)
#define SE_GENI_S_GP_LENGTH		(0x914)
#define SE_GENI_S_GP_LENGTH		(0x914)
#define SE_GSI_EVENT_EN			(0xE18)
#define SE_IRQ_EN			(0xE1C)
#define SE_IRQ_EN			(0xE1C)
#define SE_HW_PARAM_0			(0xE24)
#define SE_HW_PARAM_0			(0xE24)
#define SE_HW_PARAM_1			(0xE28)
#define SE_HW_PARAM_1			(0xE28)
@@ -220,6 +221,12 @@ struct se_geni_rsc {
#define RX_LAST_BYTE_VALID_SHFT	(28)
#define RX_LAST_BYTE_VALID_SHFT	(28)
#define RX_FIFO_WC_MSK		(GENMASK(24, 0))
#define RX_FIFO_WC_MSK		(GENMASK(24, 0))


/* SE_GSI_EVENT_EN fields */
#define DMA_RX_EVENT_EN		(BIT(0))
#define DMA_TX_EVENT_EN		(BIT(1))
#define GENI_M_EVENT_EN		(BIT(2))
#define GENI_S_EVENT_EN		(BIT(3))

/* SE_IRQ_EN fields */
/* SE_IRQ_EN fields */
#define DMA_RX_IRQ_EN		(BIT(0))
#define DMA_RX_IRQ_EN		(BIT(0))
#define DMA_TX_IRQ_EN		(BIT(1))
#define DMA_TX_IRQ_EN		(BIT(1))
@@ -331,9 +338,11 @@ static inline int se_io_set_mode(void __iomem *base, int mode)
	int ret = 0;
	int ret = 0;
	unsigned int io_mode = 0;
	unsigned int io_mode = 0;
	unsigned int geni_dma_mode = 0;
	unsigned int geni_dma_mode = 0;
	unsigned int gsi_event_en = 0;


	io_mode = geni_read_reg(base, SE_IRQ_EN);
	io_mode = geni_read_reg(base, SE_IRQ_EN);
	geni_dma_mode = geni_read_reg(base, SE_GENI_DMA_MODE_EN);
	geni_dma_mode = geni_read_reg(base, SE_GENI_DMA_MODE_EN);
	gsi_event_en = geni_read_reg(base, SE_GSI_EVENT_EN);


	switch (mode) {
	switch (mode) {
	case FIFO_MODE:
	case FIFO_MODE:
@@ -341,15 +350,23 @@ static inline int se_io_set_mode(void __iomem *base, int mode)
		io_mode |= (GENI_M_IRQ_EN | GENI_S_IRQ_EN);
		io_mode |= (GENI_M_IRQ_EN | GENI_S_IRQ_EN);
		io_mode |= (DMA_TX_IRQ_EN | DMA_RX_IRQ_EN);
		io_mode |= (DMA_TX_IRQ_EN | DMA_RX_IRQ_EN);
		geni_dma_mode &= ~GENI_DMA_MODE_EN;
		geni_dma_mode &= ~GENI_DMA_MODE_EN;
		gsi_event_en = 0;
		break;
		break;


	}
	}
	case GSI_DMA:
		geni_dma_mode |= GENI_DMA_MODE_EN;
		io_mode &= ~(DMA_TX_IRQ_EN | DMA_RX_IRQ_EN);
		gsi_event_en |= (DMA_RX_EVENT_EN | DMA_TX_EVENT_EN |
					GENI_M_EVENT_EN | GENI_S_EVENT_EN);
		break;
	default:
	default:
		ret = -ENXIO;
		ret = -ENXIO;
		goto exit_set_mode;
		goto exit_set_mode;
	}
	}
	geni_write_reg(io_mode, base, SE_IRQ_EN);
	geni_write_reg(io_mode, base, SE_IRQ_EN);
	geni_write_reg(geni_dma_mode, base, SE_GENI_DMA_MODE_EN);
	geni_write_reg(geni_dma_mode, base, SE_GENI_DMA_MODE_EN);
	geni_write_reg(gsi_event_en, base, SE_GSI_EVENT_EN);
exit_set_mode:
exit_set_mode:
	return ret;
	return ret;
}
}