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Commit 3bd4eee5 authored by Carter Cooper's avatar Carter Cooper
Browse files

msm: kgsl: Do direct register writes for A6XX perfcounter enable 



For A6XX, use the path that goes directly to the register rather than
submitting the perfcounter enables through a ringbuffer submission.

Change-Id: I7b05c144fab534301ebdd51ea41a122bd740c0ac
Signed-off-by: default avatarCarter Cooper <ccooper@codeaurora.org>
parent 05f2a6b6

drivers/gpu/msm/adreno_perfcounter.c

+2 −1
Original line number Diff line number Diff line
@@ -711,7 +711,8 @@ static int _perfcounter_enable_default(struct adreno_device *adreno_dev, 
	}

	reg = &(counters->groups[group].regs[counter]);



	if (test_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv)) {

	if (!adreno_is_a6xx(adreno_dev) &&

			test_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv)) {

		struct adreno_ringbuffer *rb = &adreno_dev->ringbuffers[0];

		unsigned int buf[4];

		unsigned int *cmds = buf;